Lattice IP suites for electronic system designers

Lattice Semiconductor has announced the availability of five intellectual property suites to accelerate the design of electronic systems in a variety of industries using the LatticeECP3 FPGA family.

News from Electronicstalk, 11 February 2011

IP core suitable for Broadcom-inclusive networks

Lattice Semiconductor has announced the immediate availability of the HiGig MAC IP core for its low-cost LatticeECP3 FPGA range, for interconnecting multiple devices to operate as one logical network.

News from Electronicstalk, 30 November 2010

Demonstration platform supports Serial RapidIO 2.1

Lattice Semiconductor has announced the availability of a fully integrated evaluation and demonstration platform supporting its Serial RapidIO 2.1 endpoint core and utilising the Lattice ECP3 FPGAs.

News from Electronicstalk, 21 October 2010

Reference designs accelerate time-to-market

Lattice Semiconductor has released more than 90 reference designs optimised for the MachXO and IspMach 4000ZE PLDs to enable designers to boost productivity and accelerate time-to-market.

News from Electronicstalk, 20 July 2010

Lattice Diamond suits low-power FPGA applications

Lattice Semiconductor has launched Version 1.0 of its Lattice Diamond field-programmable gate-array (FPGA) design software, enabling designers to target low-power, cost-sensitive FPGA applications.

News from Electronicstalk, 30 June 2010

Power management device for hot-swap applications

Lattice Semiconductor has announced the addition of the ispPAC-POWR1220-02 high-performance device for hot-swap and sequencing applications to its Power Manager II product family.

News from Electronicstalk, 3 June 2010

Lattice clock device provides evaluation platform

Lattice Semiconductor has announced the availability of an evaluation board for the Isp-Clock 5400D programmable clock device.

News from Electronicstalk, 15 December 2009

Lattice enhances FPGA design tool suite

Lattice Semiconductor has announced Version 8.0 of its ISPLever FPGA design tool suite.

News from Electronicstalk, 11 November 2009

Lattic develops 3G/4G remote radio head solution

Lattice Semiconductor and Affarii Technologies have announced that they have developed a complete 3G/4G-based Remote Radio Head (RRH) solution for wireless infrastructure customers.

News from Electronicstalk, 27 October 2009

ProcessorPM and ISPMACH development kits launched

Lattice Semiconductor has announced the availability of eight reference designs and two development kits for prototyping high-volume, low-power, space-constrained applications.

News from Electronicstalk, 10 September 2009

• Lattice announces FPGA device samples

• SP 2 supports ECP3-70 and ECP-95 devices

• Industrial temperature-qualified FPGAs launched

• PCI Express-to-HSS bridge for the CAP12-120

• Lattice enhances design tool software

• Maco cores get buffer management

• FPGAs make the automotive grade

• FPGA core enables flexible LTE design

• Programmable logic saves portable power

• Embedded soft core processor adds uClinux option

• IP library runs on 90nm embedded Flash FPGAs

• Nonvolatile FPGAs promise more for less

• Design puts FPGAs into GPON receivers

• Design tool suite expands FPGA support

• Switch to ASIC cuts FPGA production costs

• Cefriel joins Lattice Leader design program

• 65xx microprocessor core is made for FPGAs

• Low-cost FPGAs gain PCI Express core support

• Tool suite expands FPGA design capabilities

• Extreme FPGAs gain Serial RapidIO support

• Low cost FPGAs turn to display interfacing

• Low-cost FPGAs embed high-speed serdes I/O

• FPGA and IP combine to master SPI-4.2

• Lattice FPGA IP support expands

• IP cores are tailored for top-performing FPGAs

• Programmable logic meets automotive standard

• FPGAs upgrade economical processing

• Danish consultant joins design programme

• In-system-programmable clocks add more features

• Design services company chooses LatticeXP FPGA

• Power manager devices provide precise monitoring

• Mugford to bring fresh approach

• Microcontroller core is made for FPGA applications

• Design services programme formalises partnerships

• IP cores are ready to run on latest FPGA family

• Programmable logic design tools upgraded

• Basestation conference showcase for FPGAs

• Novel architecture cuts cost of nonvolatile FPGAs

• Free tools to start on programmable logic design

• Programmable chip suits Pirelli's platform

• Expanded PLD enables digital display extender

• Award for programmable clock devices

• Low-cost FPGAs hit production on schedule

• Lattice invests in Fujitsu's new fab

• Programmable system chips take Sonet onboard

• New architecture brings economy and DSP to FPGAs

• Upgrade for programmable logic design tools

• CPLD works as ideal AMD coprocessor

• ASIC and FPGA come together to optimise SPI4.2

• In-system programmable PLD runs to 1024 macrocells

• Backplane transceivers pass the test

• Field programmable system chip aids optical nets

• Briefcase shows off serial data analysers

• Programmable interface is key to optical Ethernet

• World's fastest and smallest claims for PLD

• Ethernet over Sonet solution enables multiplexer

• Chip combination speeds Sonet backplanes

• Transceiver rips data across backplanes

• The simple machine for complex design

• Lattice to acquire Cerdelinx Technologies

• Novel PLD trades logic and memory functions

• Complex programmable logic covers lower voltages

• Speedy 5ns performance from 768-cell CPLD

• In-system reprogrammable 5th-order lowpass filter

• Bigger CPLDs come onstream

• Analogue front end is dynamically reconfigurable

• I2P acquisition is intellectual boost to Lattice