Product category: Programmable Logic Devices
News Release from: Lattice Semiconductor UK | Subject: LatticeECP2M FPGAs
Edited by the Electronicstalk Editorial Team on 18 December 2007
Low-cost serdes FPGAs available in
volume
The LatticeECP2M devices are the industry's first low cost FPGAs to offer high-speed embedded serdes I/O, plus a pre-engineered physical coding sublayer block.
All five members of the LatticeECP2M FPGA series, ranging in density from 20K to 95K LUTS, have been qualified and released to volume production Announced in late 2006 and developed on advanced 90nm CMOS technology utilising 300mm wafers, the LatticeECP2M devices are the industry's first low cost FPGAs to offer high-speed embedded serdes I/O, plus a pre-engineered physical coding sublayer (PCS) block
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
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Previously, high-speed embedded serdes serial I/O with speeds over 3Gbit/s had been available only on relatively expensive high-end FPGAs.
Integrating this capability into a low cost FPGA fabric has made this higher performance interface technology accessible to a much broader range of applications in rapidly emerging, cost-conscious markets such as high volume communications, consumer, automotive, video and industrial equipment.
The LatticeECP2M devices also have dramatica