FPGAs cut the cost of embedded serdes

Production volume prices have been reduced to as low as $9.95 for the 20K-look-up-table LatticeECP2M-20, cracking the $10.00 price barrier for the first time.

In conjunction with the production release of the first devices in its acclaimed LatticeECP2M FPGA family, Lattice Semiconductor Corp has announced dramatically lower price points for the industry's first low-cost FPGAs to offer high-speed embedded serdes I/O.

Production volume prices have been reduced to as low as $9.95 for the 20K-look-up-table (LUT) LatticeECP2M-20, substantially below those of competing serdes-capable FPGAs and cracking the $10.00 price barrier for the first time.

When compared with Lattice's previously announced pricing, these prices represent a price reduction of more than 20% in less than one year.

Lattice Semiconductor has also announced that the LatticeECP2M family's performance has been boosted by up to 30% across a broad range of common logic macrofunctions such as decoders, multiplexers, counters and adders.

These performance enhancements are supported by Lattice's new gener