Product category: Programmable Logic Devices
News Release from: Lattice Semiconductor UK | Subject: Latice ECP2O-50 and ECP2-12 FPGA
Edited by the Electronicstalk Editorial Team on 15 March 2007
FPGAs have DDR interfaces to synchronous
DRAM
FPGA's Double Data Rate 2 (DDR2) Synchronous DRAM memory interfaces operate at 533Mbit/s.
Lattice Semiconductor's ECP2O-50 and ECP2-12 FPGA devices have been fully qualified and released to volume production The second-generation Lattice ECP2 "EConomy Plus" Field Programmable Gate Array (FPGA) families have been produced on 90nm Fujitsu CMOS technology using 300mm wafers
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
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