Product category: Design and Development Software
News Release from: Lattice Semiconductor UK | Subject: ispLever 4.0
Edited by the Electronicstalk Editorial Team on 10 May 2004
Upgrade for programmable logic design
tools
The latest version of the ispLever design tool suite includes major upgrades in performance and features for the design of in-system programmable FPGA, CPLD and ispGDX devices.
The latest version of the ispLever design tool suite includes major upgrades in performance and features for the design of in-system programmable FPGA, CPLD and ispGDX devices ispLever 4.0 upgrades provide users with the highest device performance yet available, and runtime, improved by over 20%, equals industry leading levels
This article was originally published on Electronicstalk on 23 Mar 2001 at 8.00am (UK)
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Users will find enhancements in every area of the design flow that improve design efficiency and ease the design process.
New ispLever 4.0 features include TCL script editing and recording, source files in multiple directories, FPGA preference/constraint editor enhancements, nodal control for CPLD design, expanded module generator support, the ispTracy in-circuit FPGA logic analyser, revised web-based help/links and DLxConne