
Intellectual Property Cores
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Latest articles from 'Intellectual Property Cores'
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Video core scales to multiple duties
Chip architecture can be easily scaled from low-cost high-definition video decoders to high-performance real-time multichannel video encoders and transcoders.
News from MnD Semiconductors, Aug 15, 2006
Company licenses IP library
Aeroflex Colorado Springs has announced an agreement with Gaisler Research to license an IP library for use in Aeroflex's future RadHard standard products.
News from Gaisler Research, Aug 14, 2006
Universal verification components speed closure
Reusable verification IP integrates compliance management and mixed-language flexibility with advanced simulation-based testbench technology.
News from Cadence Design Systems, Aug 8, 2006
Gillingham and Kaskowitz take senior roles
Two senior management appointments strengthen Mosaid's core technology and semiconductor intellectual property product development programmes.
News from Mosaid, Aug 4, 2006
Contract boost raises ARC's expectations
ARC International has announced its unaudited financial results for the six months ended 30th June 2006.
News from ARC International, Aug 3, 2006
Atmel opts for configurable video
Atmel Corp has taken a licence for the ARC Video Subsystem.
News from ARC International, Aug 3, 2006
Cores are chosen for RF duties
RF Micro Devices has signed a licence agreement for the configurable ARC 600 core family.
News from ARC International, Aug 3, 2006
Codec cuts delays at Internet bitrates
Source Elements is licensing the Fraunhofer IIS implementation of the most advanced low delay audio coding standard in MPEG-4 "Low delay advanced audio coding" (MPEG-4 AAC-LD).
News from Fraunhofer Institute for Integrated Circuits IIS, Aug 3, 2006
Programme promotes mobile graphics ecosystem
Imagination Technologies is unveiling the next stage of PowerVR Insider, the market-leading technical support and comarketing programme at Siggraph 2006.
News from Imagination Technologies, Aug 3, 2006
Balance sheet strengthened at LSI
LSI Logic Corp has reported second quarter 2006 revenues of $490 million, a 3% increase sequentially compared with the $476 million reported in the first quarter of 2006
News from LSI Logic Europe, Aug 2, 2006
First fully accredited portable 3G protocol stack
TTPCom's software is first portable 3G protocol stack to achieve full GCF and IOT accreditation
News from TTPCom, Jul 31, 2006
First Taiwan Configurability Training Centre
ARC International has announced it has opened the industry's first comprehensive training centre for configurable processor technology.
News from ARC International, Jul 27, 2006
GDA Technologies adopts test IP for serdes
LogicVision and GDA Technologies are to deliver design services for high speed I/O test with LogicVision's comprehensive at-speed test IP for high speed serdes circuits.
News from LogicVision Europe, Jul 27, 2006
Lattice FPGA IP support expands
Lattice Semiconductor has announced the availability of multimedia intellectual property (IP) cores from Art of Silicon, a new member of the ispLeverCORE Connection IP partners program.
News from Lattice Semiconductor UK, Jul 26, 2006
New core-optimised IP kits
Virage Logic and MIPS Technologies introduce new core-optimised IP kits for MIPS32 24K, 24KE and 34K core families in 90nm G process
News from MIPS Technologies, Jul 26, 2006
Processor support packages for Ceva cores
Ceva and CoWare announce availability of processor support packages for Ceva cores within CoWare ESL design environment
News from Ceva, Jul 25, 2006
RISC processor cores come without royalties
Mosis, the multiproject wafer (MPW) services provider, has partnered with Cambridge Consultants to offer customers royalty-free access to the XAP4 and XAP5 16bit RISC processor cores.
News from EDA Solutions, Jul 24, 2006
Funds pave the way to commercial products
New funding will enable CebaTech to focus on productising ESL compiler technology and Internet Protocol cores developed using the ESL compiler.
News from CebaTech, Jul 24, 2006
DigRF interface suits RF and baseband for 3G
TTPCom's 3G DigRF solution is designed to enable semiconductor device vendors to quickly and easily add a 3G DigRF compliant digital interface to both 3G RF and baseband ICs.
News from TTPCom, Jul 21, 2006
Memory interface IP makes more of embedded DDR
ARM has expanded its Velocity DDR memory interface products to support a number of application-specific SDRAM requirements.
News from ARM, Jul 21, 2006
Cores prove more popular than expected
Tensilica has revealed that market acceptance of its new Diamond Standard processor family exceeded the company's expectations in the first quarter since these processor cores were introduced.
News from Tensilica, Jul 20, 2006
Memory system IP proves popular
The Silicon Aware Self-Test and Repair (STAR) Memory System has exceeded 100,000,000 units shipped.
News from Virage Logic, Jul 19, 2006
Avago Advances to the Next Generation
Key Development in Chip Design Extends Deep Heritage of Leading-Edge IP
News from Avago Technologies, Jul 18, 2006
XPM Picked for Secure Software Storage
Bitmicro Networks Signs Corporate Agreement for Kilopass 90-Nanometer XPM Memory Technology
News from Kilopass Technology, Jul 18, 2006
MRAM cell technology for embedding
NEC has developed magnetoresistive random access memory cell technology suitable for high speed memory macro embedded in next generation system LSIs.
News from NEC, Jul 18, 2006
Showing 526-550 of 1567 articles
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Featured articles

- LSI adds processor core and memory blocks to range
LSI has announced the addition of the multicore-capable PowerPC 476 microprocessor core and high-speed, embedded DRAM memory blocks to its portfolio of custom silicon intellectual property (IP).

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