Intellectual Property Cores
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Collaboration on WiMAX security
Beceem and Elliptic, the respective leaders in the wireless broadband and security space, have joined forces to work closely with operators and service providers.
News from Elliptic, Feb 1, 2007
Specification aims to improve DDR memory designs
Denali Software has announced the release of the DFI specification version 1.0, on behalf of all DDR PHY Interface (DFI) specification participating members.
News from Denali Software, Feb 1, 2007
Audio engine gains speech codec for VoIP
Tensilica has introduced another codec for its popular HiFi 2 Audio Engine and Diamond Standard 330HiFi processor core which are specifically optimised for audio in mobile multimedia devices.
News from Tensilica, Feb 1, 2007
Sony signs for more configurable cores
Sony has renewed and updated its licence for Tensilica's Xtensa LX2 configurable processor.
News from Tensilica, Jan 31, 2007
Configurable processor cores power printer engine
Seiko Epson Corp uses Tensilica's Xtensa family of configurable processor cores in its new Realoid printer engine chip.
News from Tensilica, Jan 31, 2007
Free controller cores are optimised for FPGAs
Actel Corp has introduced two free controller cores: the small, easy-to-use CoreABC and the configurable Core8051s.
News from Actel Europe, Jan 30, 2007
IP programme provides access to PowerPC cores
Synopsys has signed an agreement with IBM to sublicense IBM's PowerPC 440 and 405 embedded microprocessor cores and associated peripheral cores directly to customers.
News from Synopsys, Jan 30, 2007
Nonvolatile memory embeds security
To support the low cost and high performance requirements of today's consumer and secure applications, Virage Logic has introduced its next generation embedded nonvolatile product.
News from Virage Logic, Jan 30, 2007
Multicore processor combines 16 RISC cores
The HyperCore Processor incorporates 16 x 32bit RISC cores managed by a high flow rate synchroniser/scheduler, sharing a common memory on an Altera Stratix II-180 FPGA.
News from Plurality, Jan 29, 2007
Structured ASICs gain gigabit Ethernet option
Dynamically configurable trimode Ethernet MAC core will enable engineers to build robust Ethernet line card, NIC card or switching applications operating at 10/100 or 1000Mbit/s.
News from eASIC Corp, Jan 29, 2007
Dongbu licenses IP for 130nm CMOS process
Licence agreement that extends the availability of ARM physical IP to designers developing chips using Dongbu's CMOS process at the 130nm node.
News from ARM, Jan 29, 2007
Dreamliner controllers run Time-Triggered Protocol
Austriamicrosystems has been selected by Hamilton Sundstrand Corporation to supply TTP controllers for use in the Boeing 787 Dreamliner.
News from TTTech Computertechnik, Jan 29, 2007
LDPC IP core to test satellite comms
The Mitre Corporation has selected Comtech AHA's Low Density Parity Check (LDPC) coding technology to demonstrate the effectiveness of LDPC on the High Data Rate Test Waveform.
News from Comtech AHA Corp, Jan 26, 2007
MIPS reports best quarter's revenue in years
MIPS Technologies has reported revenue results for its second quarter of fiscal 2007, ended 31st December.
News from MIPS Technologies, Jan 26, 2007
Processor gains RTOS support
Gaisler Research has announced the immediate availability of a complete port of the Wind River VxWorks 6.3 real-time operating system for the Leon processor.
News from Gaisler Research, Jan 26, 2007
Storage products fuel LSI's strong quarter
LSI Logic Corp has reported fourth quarter 2006 revenues of US $524 million, a 3% increase year-over-year compared with the $506 million reported in the fourth quarter of 2005.
News from LSI Logic Europe, Jan 26, 2007
LSI and Agere Systems proceed towards merger
LSI Logic Corp has announced that the waiting-period under the Hart-Scott-Rodino Antitrust Improvements Act of 1976 with respect to the proposed merger of LSI and Agere Systems has expired.
News from LSI Logic Europe, Jan 25, 2007
Interconnect technology aids wireless development
Broadcom licenses PrimeCell high-performance Amba 3 AXI interconnect technology along with the Amba Designer tool for next generation on-chip bus development.
News from ARM, Jan 24, 2007
IP core meets latest PCIe specification
Denali Software's Databahn PCI Express IP core has successfully passed the latest PCIe specification compliance testing.
News from Denali Software, Jan 24, 2007
Cores to power the digital home
NEC Electronics Corporation has selected the MIPS32 24KEc and 24KEf cores to power advanced solutions for the digital home.
News from MIPS Technologies, Jan 24, 2007
Memory controller and PLL IP move down to 65nm
Mosaid has released the industry's first complete DDR SDRAM controller and interface IP, as well as fractional PLL IP, in leading 65nm process technology.
News from Mosaid, Jan 22, 2007
Architecture aids consumer electronics innovation
More than two dozen companies demonstrated and displayed design innovations and new products based on the industry-leading MIPS architecture at the 2007 Consumer Electronics Show.
News from MIPS Technologies, Jan 19, 2007
DDR PHY spec makes awards shortlist
The recently announced DDR PHY Interface (DFI) specification has been selected among the finalists for the coveted DesignVision Award in the Interconnect Technologies and Components category.
News from Denali Software, Jan 18, 2007
Licence marks fifth GPS design win for Leon
Javad has signed a licence agreement for the use of the Leon3 processor and the GRLIB IP-library in a new GPS/Glonass receiver.
News from Gaisler Research, Jan 18, 2007
Compiler technology complements HyperTransport
CebaTech has joined the HyperTransport Technology Consortium.
News from CebaTech, Jan 18, 2007
Showing 401-425 of 1567 articles
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Featured articles
- LSI adds processor core and memory blocks to range
LSI has announced the addition of the multicore-capable PowerPC 476 microprocessor core and high-speed, embedded DRAM memory blocks to its portfolio of custom silicon intellectual property (IP).
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