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Design and Development Software
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Rapid adoption for ASIC synthesis technology
Synplicity has reported rapid adoption of its ASIC synthesis technology, including a doubling of ASIC synthesis licence revenues during 2003
News from Synplicity (18 February 2004)
Manual to standardise SystemVerilog verification
Synopsys and ARM are jointly developing a reference methodology to define a coverage-driven verification architecture using SystemVerilog, the open, industry-standard language
News from ARM (17 February 2004)
Compiler synthesis boosts reference methodology
A new upgraded ARM-Cadence Encounter reference methodology now incorporates Encounter RTL Compiler synthesis
News from ARM (17 February 2004)
More wise approach to multifunction device design
IMEC has come up with a new "Double Y" design methodology that facilitates the implementation of multifunction devices supporting an entire application domain
News from IMEC (17 February 2004)
Design methodology cuts down manual coding
Sprint is a novel design methodology that can semi-automate the transformation of sequential C-input descriptions to pipelined, or multithreaded System C output
News from IMEC (17 February 2004)
Embedded processor design tools gain C compiler
CoWare has added new functionality to its LisaTek suite of products
News from CoWare (17 February 2004)
Upgrade for software-compiled system design
A new release of the DK Design Suite extends the functionality of the high-productivity design environment for system FPGA devices
News from Celoxica (17 February 2004)
Nomination for system modelling solution
System Architect has been selected from a field of hundreds as a finalist for this year's EDN Innovation Awards
News from Summit Design (17 February 2004)
Predictive analysis for Benelux
Atrenta has signed up Transfer Nederland to deliver its award-winning suite of SpyGlass predictive analysis products to the Benelux region
News from Atrenta (16 February 2004)
Timing analyser speeds through large SoC designs
The new release of PrimeTime has set a new performance standard for static timing analysis and sign-off of 90nm designs, enabling timing analysis of 100-million gate designs
News from Synopsys (12 February 2004)
System-level design on show in Paris
Summit Design will present it's latest electronic system-level (ESL) design solutions next week at DATE 2004 in Paris
News from Summit Design (12 February 2004)
Software oversees systems design
CablEquity is a novel software package that offers an automation process from concept to manufacturing of highly integrated electronic equipment
News from TurboTools Corp (11 February 2004)
Software rolls out ahead of latest FPGAs
Altera has begun delivering design support for its Stratix II family of FPGAs to more than 20,000 customers
News from Altera Europe (11 February 2004)
Metrowerks tools support latest kernel
LynuxWorks has selected CodeTest Software Analysis Tools, Version 4 from Metrowerks, as the code analysis tool to support its BlueCat Linux embedded operating system and its Lynxos RTOS
News from LynuxWorks (10 February 2004)
Mixed-signal verification supports HLLs
Mentor Graphics has enhanced its Advance MS (ADMS) mixed-signal functional verification platform by adding support for SystemVerilog and SystemC languages Brochure available
News from Mentor Graphics UK (10 February 2004)
Library gains input from TSMC
TSMC's libraries will now be distributed through the Synopsys DesignWare library
News from Synopsys (10 February 2004)
Design flow smoothes high-speed FPGA-based systems
A new and highly efficient design flow uses Ansoft's 3D electromagnetic tools for modelling and optimising high-performance electronic designs that employ Xilinx Virtex-II Pro FPGAs
News from Ansoft Europe (10 February 2004)
RTOS aids CAN application development
Green Hills Software has released a complete royalty-free CAN application developers kit through its partnership with Steinhoff Automation Brochure available
News from Green Hills Software (9 February 2004)
EDA big guns line up to support latest devices
Altera has received support from the industry's leading EDA companies for its newly introduced Stratix II device family
News from Altera Europe (6 February 2004)
Jones and O'Grady bring experience onboard
Wind River Systems has appointed Harvey Jones and Standish O'Grady to its Board of Directors, effective immediately
News from Wind River Systems (5 February 2004)
PCB layout kits are ready for next Intel chipset
Mentor Graphics provided Intel with drop-in core layout kits for use with the Expedition PCB design flow for its next-generation chipset, codenamed Grantsdale Brochure available
News from Mentor Graphics UK (5 February 2004)
FPGA design environment promises faster timing
Actel has enhanced its Libero integrated design environment (IDE) to provide customers with faster timing closure when using the company's Flash-based ProASIC Plus FPGAs Brochure available
News from Actel Europe (4 February 2004)
Design software exploits latest FPGA technology
The latest version of the Quartus II design software is now shipping with full support for the latest Stratix II FPGAs
News from Altera Europe (4 February 2004)
New name in coverification for SoC designs
Adveda is a new Netherlands-based provider of software for the functional verification of both hardware and software, which merges the hardware and the software developments of an SoC design
News from Adveda (3 February 2004)
Family group to unify verification
The Univers product family is a unified verification solution for both hardware and embedded software design of SoCs
News from Adveda (3 February 2004)
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