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Atrenta

Address:
2077 Gateway Place
Suite 300
San Jose
CA 95110
USA
Telephone: (USA) +1 408 453 3333

http://www.atrenta.com

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Listing of all 32 news releases from Atrenta:

Software spots clocking contention

 User application article   SpyGlass-CDC allowed PLX to identify good synchronisations early in the design process.

News from Atrenta (15 April 2008)

Design analysis spots submicron defects

SpyGlass-DFT DSM is designed to address the problems associated with timing closure due to at-speed DFT.

News from Atrenta (11 March 2008)

SpyGlass design-analysis tools set the standard

The SpyGlass design analysis platform, including SpyGlass design-for-test (DFT) and clock domain crossing (CDC) tools, are to become standard deployments at TES Electronic Solutions.

News from Atrenta (30 April 2007)

EDA veterans to expand European business

Atrenta has appointed EDA industry veterans Dieter Rudolf and Martin McIntyre to help expand the company's Central and Northern European business operations.

News from Atrenta (16 April 2007)

Five new patents cover IC design analysis

Atrenta, has been awarded five new patents by the US Patent Office for significant chip design analysis technologies.

News from Atrenta (23 February 2007)

Power estimation technology donated to Accelera

Atrenta has donated its SpyGlass Design Constraints for low power design to Accellera's Unified Power Format Technical Subcommittee.

News from Atrenta (10 November 2006)

Software spots critical SoC issues early

 User