Product category: Design and Development Software
News Release from: ARM | Subject: ARM-Cadence Encounter reference methodology
Edited by the Electronicstalk Editorial Team on 17 February 2004
Compiler synthesis boosts reference methodology
A new upgraded ARM-Cadence Encounter reference methodology now incorporates Encounter RTL Compiler synthesis
This completes yet another milestone in the first year of the design chain collaboration between ARM and Cadence. The latest collaboration further demonstrates their commitment to optimising the silicon design chain by providing better quality of silicon (QoS) to Partners using ARM cores. At 130nm and below, wires dominate the performance and present a host of signal integrity problems to be solved in order to achieve first silicon success.
This article was originally published on Electronicstalk on 17 February 2004 at 8.00am (UK)
Related stories
32bit core answers automotive safety demands
Toshiba begins development of automotive controller SoCs based on the ARM Cortex-M3 processor
Reference methodology eases Cortex-M1 design
ARM and Synplicity are working together to ensure that mutual customers can successfully implement the ARM processor across a range of FPGA device families
The upgraded ARM-Cadence reference methodology, based on the Cadence Encounter digital IC platform, provides an integrated, wire-centric RTL-to-GDSII implementation for ARM partners.
The Encounter platform integrates new generation technology for wire-centric design with RTL compiler for synthesis, First Encounter for silicon virtual prototyping, NanoRoute for signal-integrity aware routing, CeltIC and VoltageStorm for signal-integrity signoff.
This upgraded release of the reference methodology enables customers to achieve improved QoS, the new metric of silicon quality, measured after wires for accuracy.
"The ARM-Cadence Encounter reference methodology is now available in limited release for some ARM9 family cores.
This release delivers significant performance results over the current Cadence methodology as a result of the addition of Encounter RTL Compiler", said John Goodenough, Global Methodology Manager, ARM.
Further reading
Suite supports full Cortex processor family
Development suite provides performance improvements and tuning for ARM processor support, most notably by providing better optimisation for the full Cortex processor family
Automated flow speeds Cortex-A8 designs
Synopsys has announced the immediate availability of a fully automated implementation flow enabled by Synopsys IC Compiler for high-performance and low-power applications
Processor is first specifically for FPGAs
The ARM Cortex-M1 processor is the first ARM processor designed specifically for implementation on FPGAs
"This open collaboration demonstrates the commitment of ARM and Cadence to increase the access to new-generation nanometer solutions for our mutual customers".
The new-generation technology behind Encounter RTL Compiler delivers global optimisation for timing closure using a patented set of global focus algorithms that produce outstanding results at each stage of implementation including a better starting point for routing complex, wire-centric designs.
Encounter RTL Compiler is used throughout the silicon design chain by application-specific integrated circuit (ASIC) and intellectual property (IP) vendors, and IC designers to help increase overall chip speed, and can help to reduce turnaround time.
"The momentum of the ARM-Cadence alliance in the past year has given ARM Partners an open choice of solutions and an open path to the future.
Today, using the upgraded reference methodology, our mutual customers will be able to achieve outstanding quality of silicon in less time", said Jan Willis, Senior Vice President of Industry Marketing, Cadence Design Systems.
"Our collaboration with ARM will continue to focus on new-generation technology, open standards and optimising the silicon design chain to deliver the critical solutions needed for nanometre design".
The reference methodology supports the ARM926EJ-S core, the ARM966E-S core and the ARM946E-S core.
The ARM-Cadence Encounter reference methodology with RTL Compiler is available in limited release from ARM.
• ARM: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• NEW
• Electronicstalk Home Page
Related Business News
Icoa Is Partnering With Anchorfree To...
...Enhance And Monetize Thousands Of Wi-fi Hotspots. Icoa, Inc., a national provider of wireless broadband Internet access and managed network services in high-traffic public locations, and AnchorFree Inc., a rapidly growing Wi-Fi community powered by advertising, have announced today that they are partne
Olympics raises demand for IT contractors
The number of IT contractors working in the engineering sector has almost doubled in 12 months because of demand generated by the 2012 Olympics, according to contractor Giant Group PLC.
Stellar Appoints CIO to Lead Call...
...Centre Outsourcing Technology Strategy. Stellar, a leading global business process outsourcing provider, today announced that Warwick Marx has been appointed Chief Information Officer of Stellar Asia Pacific.
Dell pushes for better Linux drivers
Dell wants to see better software drivers for Linux so that the firm can ship more notebooks and desktops running the operating system, according to one of its software engineers.
Eds Sales Take A Tumble
Dave Friedlos, Computing , Thursday 17 May 2007 at 00:00:00 But experts say downturn may reflect market weakness, writes Dave Friedlos Outsourcing giant EDS has released disappointing first-quarter figures showing slower growth and fewer con
Search the Pro-Talk network of sites
