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Analogue-to-digital converter dissipates 149mW

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Edited by the Electronicstalk editorial team Oct 2, 2009

Linear Technology has introduced a low-power, 14-bit, 150Msps analogue-to-digital converter (ADC) that dissipates just 149mW.

The company claims that the ADC enables portable applications limited by stringent power budgets to extend their performance capabilities, while providing a higher operating efficiency and reduced recurring operating costs for 3G/4G LTE and Wimax base station equipment.

Linear Technology has introduced a low-power 14-bit, 150Msps Analog-to-Digital Converter (ADC) that dissipates only 149mW.

Linear Technology has introduced a low-power 14-bit, 150Msps Analog-to-Digital Converter (ADC) that dissipates only 149mW.

The LTC2262 integrates two features for reducing digital feedback in situations where even good layout practice may fail.

These features, in combination with low power, facilitate the task of designing with high-speed ADCs in a variety of applications, including portable medical imaging and ultrasound, portable test and instrumentation, non-destructive test equipment, software-defined radios and cellular base stations.

Digital feedback occurs when energy from ADC outputs couples back into the analogue section, causing interaction that appears as odd shaping in the noise floor and spurs in the ADC output spectrum.

The worst situation is at midscale, where all outputs are changing from ones to zeroes, or vice versa, generating large ground currents that couple back into the input.

To combat this effect, the LTC2262's proprietary alternate bit polarity mode inverts all of the odd bits before the output buffers to equalise the number of switching ones and zeroes.

This method effectively cancels the large ground plane currents that contribute to digital feedback.

An optional data output randomiser is also available for reducing interference from the digital outputs.

The randomiser de-correlates the digital output to reduce the likelihood of repetitive code patterns that couple back into the ADC input, causing unwanted tones in the output spectrum.

Both digital feedback reduction techniques are claimed to improve spurious free dynamic range (SFDR) performance by 10-15dB.

Operating from a 1.8V analogue supply, the LTC2262 achieves power savings without sacrificing AC performance, according to the company.

This ADC offers a signal-to-noise ratio performance of 72.8dB and an SFDR of 88dB at baseband.

Linear Technology claims that ultra-low jitter of 0.17psRMS enables the undersampling of infrared frequencies with excellent noise performance.

The LTC2262's digital outputs can be set to full-rate CMOS, double-data-rate CMOS or double-data-rate LVDS.

Double-data-rate digital outputs allow data to be transmitted on both the rising edge and the falling edge of the clock, reducing the number of data lines needed by half.

A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.

Offered in a 6 x 6mm QFN package, the LTC2262 includes a clock duty cycle stabiliser circuit to facilitate non-50 per cent clock duty cycles, programmable digital output timing, programmable LVDS output current and optional LVDS output termination.

These features combine to make the data transmission between the ADC and the digital receiver more flexible, according to the company.

The LTC2262 joins a range of pin-compatible 14- and 12-bit ADCs, with sampling rates from 25Msps to 150Msps and power dissipation of 35mW to 149mW respectively.

Demonstration boards and samples are available online via Linear Technology's website.

The LTC2262 is offered in commercial and industrial temperature grades and is priced at USD57 (GBP36) each for the 14-bit LTC2262-14 and USD35 each for the 12-bit LTC2262-12 in 1,000-piece quantities.

All parts are available in optional lead-free packages for RoHS compliance.

Find out more about this article. Request a brochure, download technical specifications and request samples here.

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