Hard IP core features very low phase noise
A Perceptia Devices, Inc. product story
Edited by the Electronicstalk editorial team Aug 7, 2009
Perceptia Devices has unveiled its Deepsub PPLL01 hard IP core with an output frequency range from 9GHz to 11GHz that can be driven from sources down to 20MHz.
The design has accelerated lock-in (faster than 1us) and features a very low phase noise of -116dBc/Hz at 10GHz, measured at 1MHz offset, or ultra-low jitter of less than 400 femto-seconds rms.
The PPLL01 has a footprint of 400 x 500 micron, and it consumes only 15-20mW.
The PLL was proven in a 40nm Cmos process and is suitable for migration to other deep submicron processes and process nodes.
Perceptia's Deepsub technology is aimed at semiconductor processes of 65nm and smaller, where conventional architectures are presented with challenges.
Deepsub is designed to address these challenges and offer benefits including easy migration from one process to another, smaller die area and lower power consumption.
Performance is maintained over the full operating temperature and voltage range.
Deepsub optimises the mix of analogue circuits and DSP in order to consume very low power.
Perceptia offers the Deepsub PPLL01 in the form of hard IP for qualifying customers, with integration support and optional migration and customisation services.
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