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Library supports Variotap emulation technology

A Goepel Electronic product story
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Edited by the Electronicstalk editorial team Jul 10, 2009

Goepel Electronic has announced the development of a special model library for ARM Cortex-M3 architecture processors to support the emulation technology Variotap.

The libraries, described as Variotap models, are structured modularly as intelligent IP and enable a complete fusion of boundary scan test and JTAG emulation.

Employing this technology, embedded or external Flash can be in-system programmed via the native processor function.

Furthermore, Variotap supports interlaced bus emulation tests (BET) and system emulation tests (SET) for extended JTAG/boundary scan functionality.

The Variotap IP-models for ARM Cortex-M3 processors have been developed in co-operation with Testonica, recently affiliated into Goepel Electronic's GATE partner programme.

They enable Flash programming and numerous emulation test functions.

All possible scan chain configurations from standalone operations, mixed operations with other JTAG devices up to the utilisation of scan routers are supported.

The adaptive streaming technology of the TAP signals allows emulation tests to be carried out in parallel or interactively to boundary scan tests within a test program, whereby the number of TAPs is in principle unlimited.

Utilising the hardware platform Scanflex, for instance up to eight TAP can be controlled independently and simultaneously to other I/O resources.

In the Flash programming, embedded and external Flash are supported.

The script generation is done automatically.

In addition to dynamic testing of externally connected components such as RAM or I/O resources, the IP functions for bus simulation and system emulation enable the functional testing of on-chip interfaces as well as the execution of customer-defined program codes.

The use of Variotap does not require expert background knowledge, additional development tools or processor-specific pods, which makes the handling easy and uncomplicated.

The new Variotap IP-models are supported beginning with System Cascont version 4.5, and are activated by the licence manager.

System Cascont is a special JTAG/boundary scan development environment designed by Goepel Electronic with more than 40 integrated ISP, test and debug tools.

In regard to hardware, Variotap is supported by the controllers of the Scanbooster series and the hardware platform Scanflex.

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