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Design and Development Software
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SMT package emulator introduced
Ironwood Electronics is introducing the SF-QFE-32SA-L-01-F SMT package emulator that attaches to PCB SMT pads for a 32-pin, 0.8mm pitch QFP, and is RoHS compliant and lead free
News from Logic Technology (7 November 2005)
Toolkit speeds up driver and firmware development
Jungo Software Technologies and Microchip Technology are working together to include Jungo's WinDriver driver and firmware development toolkit with Microchip's PIC18F4550 development boards
News from Logic Technology (7 November 2005)
DFT analyser reduces test and prototyping costs
The DFT analyser from Asset InterTech reduces manufacturing and test costs by validating the boundary-scan design-for-test (DFT) features in a circuit board design before prototypes are assembled
News from Logic Technology (4 November 2005)
Integrated NAND Flash simplifies consumer devices
Esol has signed an agreement with Samsung Electronics to offer software for Samsung's NAND Flash memory products for the digital camera and cellular markets
News from Logic Technology (4 November 2005)
Powertrain control units developed using Artisan
User application article Artisan Software Tools has announced that Siemens VDO has chosen its Artisan Studio as the principal embedded software development tool for its automotive powertrain control units
News from Artisan Software Tools (3 November 2005)
Radiowave simulator available free of charge
Radioplan, has announced that a new student edition of its Radiowave Propagation Simulator (RPS) will be made available for download, free of charge, from its website
News from Radioplan (3 November 2005)
Diagnostic tool enhances semiconductor yield
Mentor Graphics' YieldAssist diagnostic tool enhances semiconductor yield and expands the firm's Design-for-Test product portfolio and platform beyond classical test generation and defect detection Brochure available
News from Mentor Graphics UK (2 November 2005)
Simulator helps Exar speed up chip development
User application article Synopsys has announced that Exar has adopted its VCS comprehensive RTL verification, a key component of the Discovery Verification Platform, to speed chip development
News from Synopsys (2 November 2005)
Driver kit joins USB microcontroller boards
Jungo's WinDriver driver and firmware development toolkit is now bundled with Microchip's PIC18F4550 development boards
News from Jungo (28 October 2005)
RTL-to-GDSII flow speeds 65nm serdes to market
User application article Next-generation serdes vendor Aeluros has successfully taped out a 65nm high-density low-power IC using Blast Create, Blast Fusion and Blast Noise
News from Magma Design Automation (28 October 2005)
Celoxica makes stock exchange debut
Celoxica Holdings is now listed on the Alternative Investment Market (AIM) of the London Stock Exchange
News from Celoxica (28 October 2005)
Management system is made for electronics design
CXInsight for Electronics is a novel and powerful project content management system developed by electronics specialists for the electronics industry
News from Adeon Technologies (27 October 2005)
Software measures mixed-signal voltage levels
A free JTAG-powered software tool supports the new SCANSTA476 analogue voltage monitor from National Semiconductor
News from JTAG Technologies (26 October 2005)
Functional verification takes tailored approach
Cadence Design Systems has repackaged its Incisive functional verification platform, including full solutions with tailored and integrated products coupled with methodologies for unique segment needs
News from Cadence Design Systems (26 October 2005)
Teams turn to SystemVerilog-based verification
The Incisive Design Team family is tailored for RTL design teams looking for a low-risk, yet powerful way to adopt SystemVerilog-based verification from plan to closure
News from Cadence Design Systems (26 October 2005)
Software increases FPGA designer productivity
The latest version of Altera's Quartus II includes design support for the new Stratix II GX FPGA family and new tools for increasing designer productivity
News from Altera Europe (25 October 2005)
C compiler is integral to processor design tools
CoWare is to continue to deliver ACE's C-compiler technology deeply integrated into the CoWare Lisatek processor design tool suite
News from CoWare (25 October 2005)
Altium sponsors Brazilian space research
Altium has concluded a sponsorship deal with Brazil's National Institute for Space Research, Space and Atmospheric Sciences Division
News from Altium (25 October 2005)
Design system takes an enterprise-wide view
Mentor Graphics has released its new Expedition Enterprise flow for PCB systems design Brochure available
News from Mentor Graphics UK (25 October 2005)
Diagnostic tools boost IC yields
User application article Taiwan Semiconductor Manufacturing Company (TSMC) has adopted Synopsys' TetraMAX yield diagnostic tools for its scan diagnostics service
News from Synopsys (25 October 2005)
C-code generator audit completed
Mike DeWalt, a globally recognised Consultant Designated Engineering Representative appointed by the FAA, has completed his audit of Esterel's Scade/KCG qualified C code generator
News from Esterel Technologies (24 October 2005)
ESL by any other name
Technical background article The latest hot topic in the chip design world recently has been electronic system level design, says Rob Irwin, Product Marketing Manager at Altium
News from Altium (24 October 2005)
Analyser keeps watch over design for test rules
A new DFT analyser reduces manufacturing and tests costs by validating the boundary-scan design-for-test features in a circuit board design before any prototypes are assembled
News from Asset InterTech (21 October 2005)
Renesas opts for model-based yield analysis
Renesas Technology has adopted model-based yield analysis technology from Ponte Solutions for critical area analysis and enabling reduction of yield-loss due to random defect-limited yield issues
News from Ponté Solutions (21 October 2005)
Novel tool cuts GDSII data down to size
SoftJin Technologies reckons its new design tool GDSIIZIP compresses large IC layout files in GDSII format by up to 20 times, making it four or five times better than existing products
News from Softjin Technologies (21 October 2005)
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