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Design and Development Software
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Interlocking project gets its modelling software
Statemate Magnum, from I-Logix, with model checking capability developed by OSC, has been chosen by the Euro-Interlocking project, putting it at the heart of development in the European rail industry
News from I-Logix Europe (22 November 2001)
STMicroelectronics uses Cadence VCC methodology
User application article STMicroelectronics has selected the Cadence Virtual Component Co-Design (VCC) for both its automotive and digital consumer platform system-level design methodology and design flow
News from Cadence Design Systems (20 November 2001)
Familiar programming for mixed-signal PLDs
Sequoia's portfolio of Xicor programmable mixed signal devices can now be configured via LabVIEW, using new software and drivers jointly developed by Xicor and Cal-Bay Systems
News from Sequoia Technology (20 November 2001)
Design and verification path from C++ to PLDs
Synplicity and Forte Design Systems have announced the availability of the industry's first complete design and verification path from C++ to programmable logic implementation
News from Synplicity (20 November 2001)
Design flow speeds multi-million-gate design
User application article Advanced Hardware Architectures has designed and taped-out a 10-million-gate forward error correction IC using the 64bit Cadence SP and R design flow
News from Cadence Design Systems (19 November 2001)
Ansoft jumps 30% in Q2 and predicts further rises
Ansoft Corp has announced financial results for its second fiscal quarter ended 31st October 2001
News from Ansoft Europe (19 November 2001)
Altera and Synopsis to simplify SoPC design
Altera and Synopsys are to create ASIC-like design solutions for system-on-programmable-chip devices to meet the need for next-generation design and verification flows for high-density PLDs
News from Synopsys (15 November 2001)
First support package for TriCore 2
Altium claims there are a number of substantial enhancements and improvements in version 1.4 of the Tasking TriCore software development toolset
News from Altium (14 November 2001)
Synopsys helps with the MIPS power budget
MIPS Technologies has selected Synopsys' PrimePower for power analysis in its synthesiseable core design flow
News from Synopsys (14 November 2001)
Synopsys acquires technology from C Level Design
Synopsys has entered into an agreement to acquire technology assets from C Level Design
News from Synopsys (14 November 2001)
Toolset makes more of MCU memory
V7.5 of the Tasking C166/ST10 toolset delivers advanced automated memory utilisation for the complete range of C166/ST10 derivatives
News from Altium (13 November 2001)
FPGA software imports legacy designs with ease
FPGA Advantage 5.2 from Mentor Graphics provides designers with an integrated environment for design creation, management, simulation and synthesis of FPGAs Brochure available
News from Mentor Graphics UK (13 November 2001)
Upgrade boosts verification performance
Synopsys has integrated its Vera and VCS tools to boost verification performance
News from Synopsys (13 November 2001)
Software speeds wireless deployment
Motorola Computer Group has launched a new version of its FACT software to help telecomms OEMs speed the development of wireless media gateways and enhanced voice-based service platforms
News from Motorola Embedded Communications Computing Group (12 November 2001)
Physical verification extended to SiGe process
Mentor Graphics is developing physical verification tool support for IBM's mixed-signal SiGe family of semiconductor processes Brochure available
News from Mentor Graphics UK (12 November 2001)
Mentor improves on pessimistic Q3 forecast
Mentor Graphics has reported third-quarter 2001 earnings-per-diluted-share before goodwill of $0.12 on revenues of $131 million, ahead of estimates of $0.07
News from Mentor Graphics UK (12 November 2001)
IC Wizard does the trick for Morphics Technology
User application article Fabless semiconductor company Morphics Technology has successfully completed multiple chips ranging from 5 to 15 million gates using Monterey's IC Wizard hierarchical design planner
News from Monterey Design Systems (12 November 2001)
Cadence to acquire Silicon Perspective
Cadence Design Systems has signed a definitive agreement to acquire Silicon Perspective Corp (SPC)
News from Cadence Design Systems (9 November 2001)
Firmware development kit gets boots up and running
Wind River has announced the availability of visionWARE for the PowerPC, ARM and MIPS architectures
News from Wind River Systems (7 November 2001)
Synthesis software supports latest FPSLICs
The newest version of Synplicity's Synplify and Synplify Pro FPGA synthesis software includes optimised support for field-programmable system-level IC solutions from Atmel
News from Synplicity (6 November 2001)
Cut-down design software goes web freeware
Cadstar Express is a free web download of Zuken's industry-standard PCB design solution, Cadstar 5.0
News from Zuken (5 November 2001)
Paion chooses Astro for SoC design closure
Paion Co has selected the Astro physical optimisation, placement and routing system from Avant!, as its design automation solution to achieve rapid design closure for SoC designs
News from Avant! Corporation (5 November 2001)
Software programs analogue devices
Lattice Semiconductor has announced manufacturing software support for its revolutionary ispPAC in-system programmable analogue circuit family of devices
News from Lattice Semiconductor UK (5 November 2001)
Logic placement speeds synthesis an extra 10%
Synplicity has enhanced its FPGA/PLD synthesis and physical synthesis software with new productivity and performance-improving features designed to enable higher quality of results
News from Synplicity (1 November 2001)
Early assessment for Mitsubishi ASICs
First Encounter software from Silicon Perspective Corp (SPC) has been integrated into the standard ASIC design flow of the Electronic Device Group of Mitsubishi Electric and Electronics USA
News from Silicon Perspective Corporation (1 November 2001)
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