Product category: Design and Development Software
News Release from: Synplicity | Subject: Synplify Pro/Cynthesizer
Edited by the Electronicstalk Editorial Team on 21 November 2001
Design and verification path from C++ to
PLDs
Synplicity and Forte Design Systems have announced the availability of the industry's first complete design and verification path from C++ to programmable logic implementation.
Synplicity and Forte Design Systems have announced the availability of the industry's first complete design and verification path from C++ to programmable logic implementation As a result of the companies' joint development efforts, designers can use Forte's Cynthesizer C++-to-HDL product and verification suite with Synplicity's Synplify Pro RTL synthesis solution to synthesise C++ code into a gate-level netlist for a broad range of programmable logic devices (PLDs) from leading vendors, including the Excalibur embedded processor solutions now available from Altera
This article was originally published on Electronicstalk on 16 Apr 2008 at 8.00am (UK)
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