Early assessment for Mitsubishi ASICs

A Silicon Perspective Corporation product story

Edited by the Electronicstalk editorial team Nov 2, 2001

First Encounter software from Silicon Perspective Corp (SPC) has been integrated into the standard ASIC design flow of the Electronic Device Group of Mitsubishi Electric and Electronics USA.

First Encounter software from Silicon Perspective Corp (SPC) has been integrated into the standard ASIC design flow of the Electronic Device Group of Mitsubishi Electric and Electronics USA.

This integration enables Mitsubishi Electric's North American ASIC customers to rapidly assess the timing and routability of a design and produce their own hierarchical partitioning, floorplan and placement without having to go through a full physical design cycle.

"SPC's First Encounter offers our system-on-chip customers a rapid, effective way to directly control timing closure on complex flat and hierarchical designs," said Kenji Baba, director of system-level IC marketing for Mitsubishi Electric and Electronics USA.

"This flow is fast, easy to use, and produces accurate, physically feasible results on very large designs".

Mitsubishi Electric offers a very effective methodology for ASIC designers who want greater visibility into their chip's physical implementation than afforded by simply handing off a logical netlist.

By using SPC's First Encounter software, they can quickly create an ASIC "physical prototype", which is essentially a trial layout of the entire chip.

This gives very close timing and routing correlation to final silicon.

The physical prototype includes a design-rule compliant, timing-correct, and known-routable floorplan and placement that can be handed directly to Mitsubishi Electric for final physical implementation.

"We're delighted to have an alliance with Mitsubishi Electric to deliver support for this flow", stated Michel Courtoy, SPC's vice president of marketing.

"Traditional floorplanning tools haven't worked well in ASIC flows, because they did not ensure the chip could actually be completed.

First Encounter's physical prototype approach finally gives ASIC designers the confidence to take ownership of the floorplan and placement aspects of a design.

This significantly reduces the number of iterations between the designers and their ASIC vendor".