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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Allegro
Edited by the Electronicstalk Editorial Team on 10 September 2004

Design platform aids chipset implementation

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The Cadence Allegro system interconnect design platform has been further customised for engineers designing printed circuit boards (PCBs) for advanced chipsets

The Allegro system interconnect design platform can be used in conjunction with a silicon design-in kit, available from Intel as a drop-in core layout (DCL), for the newly announced Intel 915 and 925X Express chipsets. The Intel DCL supports both PCB layout and system-level signal integrity simulation.

The DCL for the Intel 915 and 925X Express chipsets provides working examples of complex chipsets being designed into the system PCB using Cadence Allegro PCB Editor format.

The DCL enables OEMs and ODMs to accelerate their design cycle by re-using the proven integration of CPU, chipset and other motherboard components with the Allegro design platform.

"The Allegro platform provides an efficient and flexible methodology for the electronics industry to implement Intel 915 and 925X Express chipsets", said Brad Griffin, Product Marketing Director, Silicon Design-in, Silicon-Package-Board Group, Cadence Design Systems.

"Anyone wanting their add-in cards communicate effectively with Intel's new chipsets can utilize the Allegro PCI Express topologies and MacroModels as a testing vehicle".

The Allegro system interconnect design platform brings together all of the existing Cadence technologies for IC package and PCB design, including Allegro PCB SI, in an integrated high-speed design and analysis environment for engineers creating complex digital PCB system and IC package designs.

"Intel customers now have a readily available implementation of our newest Pentium 4 processor-based platforms with the Cadence Allegro system interconnect design platform", said Sunil Kumar, Intel's Director of Chipset and Software Marketing.

"Intel 915 and 925X Express chipset customers can drop the implementation into their own design using the Intel DCL kit with the Cadence Allegro design platform, making the design-in process as seamless as possible".

System level signal integrity analysis enables testing of the Intel chipsets' high-speed signals, including 2.5Gbit/s PCI Express signals that communicate with devices located on addon cards.

These signals can be simulated with Allegro PCB SI behavioural MacroModels, providing accurate results hundreds of times faster than transistor-level Spice models.

This combination of key technologies optimises and accelerates high-performance, high-density interconnect design for PC motherboard designers and manufacturers.

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