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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Assura RCX
Edited by the Electronicstalk Editorial Team on 9 January 2003

Speed and accuracy
boost for parasitic extraction

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Cadence Design Systems and Agere Systems have released the latest enhancement of the Cadence Assura RCX platform for high-accuracy layout parasitic extraction

Cadence has incorporated Agere Systems' Nebula technology, licensed exclusively to Cadence, into the Assura RCX product line. This provides the industry's first completely integrated, fast field solver capability in a device-level extractor. The combined technology provides chip designers with fast, highly accurate parasitic extraction for selected nets or blocks.

By integrating Nebula into the Cadence industry-leading analogue design environment, microchip designers will have a fast and highly accurate tool for design of high performance analogue and mixed-signal ICs.

The Assura Parasitic Extractor (RCX) is a comprehensive full-chip, three-dimensional, device-level solution that enables analysis of chip electrical performance with high accuracy parasitic extraction from the physical layout.

With Assura RCX-FS, designers can quickly access field solver accuracies within the Cadence analogue design environment.

RCX-FS is the first tool to provide a practical design approach to integrating a field solver into a full chip, extracted netlist.

This capability enhances first silicon success without extending design cycle time.

Agere's Nebula high accuracy field solver is based on a sophisticated algorithm enhanced at Agere to meet the company's critical need for highly accurate, highly sensitive, critically timed high-speed circuits.

With Assura RCX-FS as an integral part of its design flow, Agere achieves the necessary device-level parasitic resistance and capacitance extraction.

Today's complex process technologies require extremely accurate parasitic modelling for timing and noise sensitive sections of the chip, such as the low voltage bitline signal development path in memory designs.

At Agere, high-density memory compiler leaf cells for high-speed circuits are extracted with Nebula.

This provides the accuracy so critical in enabling subsequent higher-level simulation.

"Our Nebula technology has resulted in significantly improved modeling results", said Kathy Krisch, Agere's Director of Modelling and Design Kits.

"Our previous extraction tool underestimated the parasitic capacitance due to via effects.

With Nebula, we experienced a 30% improvement in accuracy, allowing us to retime the circuit appropriately and prevent silicon failure.

Having Nebula technology available in the Assura platform will allow Agere to more quickly and efficiently extract and simulate critical parasitics in our high-performance circuits".

When using Assura RCX-FS with Assura RCX, designers can perform a one-pass parasitic extraction of larger designs.

Assura RCX-FS is used for critical net extraction and Assura RCX to extract parasitics on the rest of the chip.

The results from both tools are automatically combined into a merged netlist for full-chip simulation.

With Assura RCX and Assura RCX-FS, designers can minimise silicon re-spin and increase design productivity.

Nebula is a high-accuracy field solver developed at Agere Systems by David E Long and Sharad Kapur.

It is based on a sophisticated version of a numerical algorithm called the fast multipole method (FMM).

The FMM was invented at Yale for numerical analysis and first applied to capacitance and IC problems at MIT.

The algorithm was refined and enhanced at Lucent Technologies Bell Labs, and subsequently at Agere, to be applicable to large-scale capacitance problems encountered in modern ICs.

"We initially developed and deployed Nebula for internal use", said Krisch.

"However, it was recognised that in order to fully meet the needs of Agere's design community, the Nebula technology needed to be integrated with a highly-capable extraction tool.

Agere chose to align with Assura RCX from Cadence because of the high-accuracy and speed it provided in its pattern matching solution".

Nebula is significantly faster than field solvers based on other currently used algorithms such as, finite elements techniques or random walk methods.

With Nebula, there is a smooth tradeoff between speed and accuracy.

This allows designers to achieve a very accurate solution at a very high speed, or the most highly accurate solution at a slower speed, depending on specific needs and resource constraints.

In addition, Nebula is the only available tool that accurately handles features especially critical in nanometer design such as, via effects, trapezoidal wires, conformal dielectrics, air gaps and process bias.

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