Phase locked loop IP cuts down jitter

True Circuits has developed a line of spread-spectrum and low-bandwidth phase-locked loop analogue hard macros with LockNow! technology.

True Circuits has developed a line of spread-spectrum and low-bandwidth phase-locked loop (PLL) analogue hard macros with LockNow! technology.

True Circuits' low-jitter spread spectrum PLL allows the spread-spectrum functionality to be included in the ASIC rather than requiring a separate part on the system board, thus reducing manufacturing costs.

It is designed to multiply an input clock by an integer or fixed-point number with a frequency spreading capability suitable for PC, networking and consumer electronics applications that require spread-spectrum clock sources to satisfy FCC requirements for RF emissions.

True Circuits' low bandwidth PLL is designed to address the problem of excessive jitter from system clocks originating from lower-quality crystals.

This PLL design generates high-speed clocks required for processors and chip interfaces that require low-jitter performance.

"We developed these high-performance PLLs to help circuit designers meet the performance goals required by specialised product applications", noted Dr John Maneatis, True Circuits' President.

"Our new Spread Spectrum and Low Bandwidth PLLs are rich with features and are based on the same core technology as our other low-jitter PLLs, including special circuitry that allows for very fast locking with minimal frequency overshoot.

We call this circuitry LockNow! Technology and now offer it on all True Circuits PLLs to improve PLL lock times by two or more orders of magnitude".

True Circuits' Spread Spectrum PLL generates a spread-spectrum clock that lowers EMI emissions from chips.

It has completely adjustable bandwidth, spreading rate, and spreading amount.

While the actual spreading amount with a particular setting can be difficult to control for most PLL designs, True Circuits' design employs unique circuits to eliminate variability in the actual spreading amounts.

The low bandwidth PLL has adjustable bandwidth and allows the designers to dial-in the desired amount of period jitter filtering.

The bandwidth is adjusted as a precise fraction of the reference frequency.

True Circuits PLLs with LockNow! technology achieve lock in essentially constant time at a particular output frequency independent of feedback divider and bandwidth settings, regardless of the loop bandwidth for a given output frequency, and add no additional frequency overshoot.

Unlike competing designs, LockNow! PLLs have no special modes that require external control and no lurking failure mechanisms found only on the production line.

ASIC and SoC designers employing LockNow! PLLs can typically expect two or more orders of magnitude improvement in lock times with the same level of input period jitter rejection as before.

"True Circuits' continuous product improvements are driven by lab experience, customer requirements and our unique understanding of the PLL design problem", added Dr Maneatis.

"LockNow! Technology is just one of the many improvements that we have standardised into our entire family of PLL designs and rolled out to our customers over the last few years.

In this case, LockNow! Technology was developed for customers with fast startup time requirements, usually stemming from low-power designs which power down the PLL when not active.

However, as there is no tradeoff with LockNow! Technology, all our PLL customers will benefit from this significant improvement".

True Circuits PLLs with LockNow! technology are available for immediate customer delivery.

The hard macros are available for a per use licence fee with no royalty fees.

The licence fee includes integration support from TCI to ensure a successful customer tapeout.

The deliverables include GDSII and LVS Spice netlists, Verilog and synthesis models, Library Exchange Format (LEF) files and extensive user documentation.

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