Memory roadmaps show the way ahead

Toshiba has revealed its latest strategic roadmaps for the memory market.

Toshiba has revealed its latest strategic roadmaps for the memory market.

These roadmaps reflect the company's continued focus on the rapidly growing file storage market, the mobile electronics memory market, and high-performance solutions for networking and digital consumer applications.

This market segmentation enables Toshiba to respond rapidly to customer requirements and develop advanced memory solutions to meet their needs.

Toshiba's current line-up of memory products serving these three market segments includes NAND Flash, high-density NOR Flash, low-power SRAMs, pseudo SRAMs (PSRAMs) and advanced multi-chip packages (MCP) that integrate various memory technologies into a single package.

For the networking and extreme performance digital consumer market, Toshiba offers network fast-cycle RAMs (network FCRAMs) and XDR DRAM.

NAND Flash memory continues to be one of the fastest growing semiconductor products.

Continuing increases in density and improving cost-per-bit fuel strong demand for NAND as a cost-effective memory choice for a wide range of file storage applications, including digital still and video cameras, USB drives, audio players, PDAs, solid-state disk drives, PC cards and more.

Toshiba expects the market for NAND Flash to see 30% annual growth from CY2003 to CY2007, from Y380 billion (approximately US $3.5 billion) to Y1.2 trillion (approximately US $10.9 billion).

Toshiba recently announced that it is migrating NAND Flash production to 90nm process technology, which has enabled the company to introduce the industry's first 4Gbit multilevel cell (MLC) NAND memory, as well as a stacked, dual-die 8Gbit device.

These chips provide nearly twice the memory capacity of conventional chips of the same size by storing 2bit per cell.

Toshiba has also developed faster MLC NAND solutions by increasing the block size and optimising the memory control function in the chips.

By third quarter, Toshiba will bring a 16Gbit MLC NAND Flash device to market by combining four 4Gbit die in a single package.

To help meet the rapidly growing demand for NAND, Toshiba started construction in April 2004 on a new $2.5 billion, 300mm fab that is expected to come on line in the second half of fiscal 2005 with an initial output capacity of 10,000 wafers per month, growing to 37,500 wafers per month.

Toshiba will fund construction of the building, and FlashVision Japan, a joint venture between Toshiba and its NAND Flash strategic partner, SanDisk Corp, will fund its advanced manufacturing equipment, with each partner providing an equal share of the funds.

The roadmap for further lithography advances calls for mass production at 70nm to start in the first half of fiscal year 2005 at the existing 200mm fab, and in the first half of fiscal year 2006 at the new 300mm fab.

Mass production of 55nm NAND Flash is scheduled to start in calendar year 2007 at the new fab.

For mobile electronics applications, Toshiba is one of the leading suppliers of MCPs, which combine various memory technologies in a single small-footprint component to meet the increasingly complex memory requirements of mobile devices.

A key trend in MCP configurations is the inclusion of NAND Flash in addition to, or in place of, NOR Flash because of its significantly faster program and erase speeds which are necessary for fast data storage, especially in camera phones.

Popular NAND based MCPs, which Toshiba also offers, include PSRAM+NOR+NAND and NAND+LPSDRAM.

To further reduce power consumption and improve memory subsystem performance in advanced 2.5G and 3G cellphones, Toshiba plans to offer a full 1.8V MCP device that incorporates burst mode NOR Flash, burst mode PSRAM, low-power SRAM, NAND and/or low power SDRAM.

Typical configurations demanded include PSRAM+NOR, PSRAM+NOR+NAND, PSRAM+NOR+NAND+SDRAM or NAND+SDRAM.

Earlier this year, Toshiba developed an MCP with 1.4mm thickness that can stack nine layers (for example, six memory chips with three spacers).

Toshiba has used advanced process and mounting technology to shrink each memory chip to 70um thickness, the thinnest in the world for MCP applications, and then bond the chips together in one package by wires.

The MCP consists of a combination of memory chips, such as SRAM, PSRAM, SDRAM, NOR Flash memory and NAND Flash memory.

By using this technology, with a fewer number of chips stacked, it has also become possible to achieve an MCP with 1.0mm thickness.

The chip combination available in these MCPs is flexible to accommodate the performance requirements of the customer and to create the most effective package.

Toshiba currently offers PSRAM in densities from 32 to 128Mbit, the industry's highest density of this low-power memory that has gained acceptance in cellphone applications, where the need for higher density working RAM is rapidly growing as more features and functions are implemented.

PSRAM memory chips combine a DRAM cell for high density and low bit cost with an asynchronous SRAM external interface to facilitate efficient system design.

Toshiba's burst PSRAM is based on a common specification between Toshiba, NEC Electronics and Fujitsu for PSRAM devices that feature burst mode function enabling fast access operation.

Each of the three companies independently manufactures and markets PSRAM products based on the common specification, called Common Specifications for Mobile RAM (COSMORAM).

Toshiba recently announced a 1.8V 128Mbit burst mode PSRAM for faster, low-voltage operation in next-generation cell phones.

Looking ahead, Toshiba will support PSRAM up to 256Mbit at 110nm in 2005.

As part of its full 1.8V MCP solution, Toshiba is expanding its NOR Flash line-up with a 128Mbit page/burst NOR Flash manufactured on a 130nm design rule.

This device complements a selection of NOR Flash in 16 to 128Mbit densities.

The roadmap calls for higher density 256 and 512Mbit products with the migration to 90nm process technology in 2005.

Toshiba's current low power SRAM line-up is manufactured on a 150nm design rule, with densities of 4, 8 and 16Mbit in various speeds and input voltages from 1.8 to 5V.

The product roadmap calls for progression to 130nm in 2004.

For the communications market, Toshiba offers a family of network FCRAM that combines DRAM densities with random cycle performance approaching that of high-speed SRAM to provide a cost-effective, high-performance solution for high-speed networking, routers, switches, and Internet servers.

Network FCRAM features a short bus turnaround time, fast random access and cycle time, and a simple and consistent protocol, with a simplified command set.

A variety of products are now available from Toshiba, including 256Mbit x8/x16, 288Mbit x18/x36 and 512Mbit x8/x16.

Network FCRAM has been supported since the end of 1999 and has enjoyed tremendous growth in design activity over the past year as a low cost, high performance replacement to high speed SRAM and DDR SDRAM for look-up table and buffer memory.

Current devices are manufactured on a 130nm design rule and support random cycle times down to 20ns and data transfer rates up to 666Mbit/s.

Next-generation devices will use a 110nm process and will offer higher data transfer rates and higher densities reaching 1.152Gbit in 2006 at 90nm.

In late 2003, Toshiba was the first manufacturer to sample 512Mbit XDR DRAMs with a data transfer speed of 3.2GHz, the world's fastest speed of any memory device.

These DRAMs are based on Rambus' XDR memory interface technology and offer octal datarate, which transfers eight data blocks per clock cycle and offers eight times the bandwidth of today's best in class PC memory.

XDR DRAM is targeted for use in next-generation, high-performance broadband applications, including digital consumer electronics, network systems and graphic systems which are expected to require very high density, ultra-high-speed memory chips.

Toshiba's initial product samples were developed on a 130nm process technology and shrink 110nm product is already under development for volume ramping in 2005.

The company plans to migrate to a 90nm process in 2006, when the market for these emerging devices is expected to expand further.

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