Product category: Microprocessors, Microcontrollers and DSPs
News Release from: Telairity Semiconductor | Subject: T1P2000
Edited by the Electronicstalk Editorial Team on 12 September 2005

Video processor is
made for H.264 encoding

The first high-definition H.264 video encoder based on Telairity-1 is being presented by Telairity Semiconductor at IBC 2005 Stand 1.101

The first high-definition (HD) H.264 video encoder based on Telairity-1, a breakthrough processor architecture developed specifically for broadcast-quality HD applications, is being presented by Telairity Semiconductor at IBC 2005 Stand 1.101. At its IBC 2005 exhibit, Telairity is showing H.264 HD video encoded to the new H.264 standard using its AVClairity encoding software with Telairity-1, a new microprocessor architecture targeting real-time H.264 high-definition video encoding, and other demanding video and imaging applications.

AVClairity HD video encoding software supports AVC (Advanced Video Codec) level 4.0 for broaDCast encoding at HD resolutions of 720p60 and 1080i60.

Encoder products built using AVClairity on Telairity-1 will be used to create next-generation H.264 HD broadcast video encoding systems that offer bandwidth savings of over 50% relative to MPEG-2 encoders.

This capability is particularly important for bandwidth-constrained broadcasters and service providers, for which Telairity-based encoder solutions will enable increased channels of HD content and services worldwide over satellite, cable, and IP networks.

AVClairity encoding software and the Telairity-1 processor architecture were developed concurrently by Telairity and uniquely provide broadcast equipment manufacturers with a complete hardware/software solution for H.264 compression in which the encoding hardware and software are guaranteed to work together.

By co-engineering both the software and hardware, Telairity is able to deliver H.264 encoding solutions that provide the highest level of video processing available in a single chip, thus lowering costs and accelerating time to market for broadcast equipment OEMs.

Specifically designed for HD video compression compliant with the H.264 standard, Telairity-1 delivers all the computational horsepower of a programmable multicore processor with five independent vector/scalar cores, a video controller, and a DRAM controller supporting a 5.3Gbyte/s I/O bandwidth.

AVClairity maximises the performance of Telairity-1 in AVC H.264 encoding applications by making full use of the strong capabilities of the Telairity-1 instruction set and the immense parallelism built into a multipipe vector processor.

'There is strong demand for infrastructure equipment that can support high-definition video for satellite, cable, and over-the-air broadcasting, as well as for IPTV services', said Howard Sachs, founder, President, and CEO of Telairity Semiconductor.

'But the ability to support real-time, high-definition video processing is compounded by two challenges: HD video has six times as much data as standard definition (SD) video, and the next-generation AVC (H.264) video compression standard is at least four times as computationally intensive as the MPEG-2 compression standard'.

'Telairity-1 and AVClairity were designed from the ground up to meet these challenges as the H.264 encoding engines for next-generation broadcast encoders, video servers, and video edit and authoring systems'.

At a clock rate of 668.25MHz, or nine times the 74.25MHz 20bit video standard, the T1P2000, first chip to be built on the Telairity-1 architecture, achieves a total sustained chip performance of 55.5GOPS (giga-operations per second).

Where a general-purpose, 600MHz to 1GHz DSP-based real-time H.264 encoder implementation would require 18 to 32 DSPs and six or more FPGAs, the Telairity-1/AVClairity solution requires only four to eight Telairity video processors and one small FPGA to achieve equivalent bitrates and quality.

To help equipment manufacturers get to market quickly with encoders using Telairity-1 technology, Telairity provides two development platforms.

The T1P2000EP Evaluation Platform provides software developers and architects a tool to evaluate the exceptional performance of the Telairity-1 architecture and develop their proprietary video software.

The EP platform supports up to four TVM200 video modules and program download via an RS422 interface.

The TVM200 video module includes the T1P2000 processor and 512Mbyte of DDR2 DRAM memory.

An industry-standard Gnu debugger enables programmers to step through their software in an efficient and familiar development environment.

The T1P2000DP Encoder Development Platform is targeted specifically at OEMs developing encoder solutions based around Telairity's AVClairity technology.

The T1P2000DP includes eight T1P2000 Telairity-1 video processors and the FPGA reference code that supports programmable interconnect between the video processors and enables OEMs to add their own video preprocessing, filtering, and other unique features.

Telairity further supports OEM customers with AVCxpress, a custom board design and prototyping service dedicated to helping manufacturers accelerate time to market for broadcast encoders, video servers, and video edit and authoring systems.

Telairity Semiconductor is currently sampling the Telairity-1 T1P2000 video processor and is also shipping the T1P2000EP Evaluation Platform.

Telairity will begin sampling its first complete hardware/software H.264 encoding solution and the T1P2000DP Development Platform in Q1 2006.

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