Product category: Design and Development Software
News Release from: Synopsys | Subject: Pilot Design Environment
Edited by the Electronicstalk Editorial Team on 28 February 2006

In-house design environment
goes to market

The Synopsys Pilot Design Environment is a complete RTL-to-GDSII design system developed by Synopsys Professional Services and based on Synopsys' Galaxy and Discovery platforms

Synopsys' Pilot Design Environment provides a comprehensive, production-ready design flow with built-in methodologies and utilities to improve designer productivity and accelerate the tape-out of system-on-chip designs. A high degree of automation and configurability enables customers to adapt the environment to meet their project-specific technical and business objectives.

In addition, features for capturing and reporting project metrics are integrated into the Pilot Design Environment, enabling customers to monitor and measure project status and better predict achievement of key milestones.

'Synopsys' Pilot Design Environment helped us achieve multiple chip tape-outs at a new technology node in a fraction of the time it would have taken had we built the flow from scratch', said Gary Kirchner, Director or Electronic Hardware Design, Honeywell Aerospace.

'Utilising this design environment, we are able to more quickly produce our customers' chips and with lower risk'.

Derived from the extensive experience of Synopsys' design services organisation and used by Synopsys consultants on dozens of customer design projects each year, the Pilot Design Environment has demonstrated success at improving design productivity and easing significant design transitions, such as migration to a new process node or design methodology.

A new graphical user interface (GUI) simplifies setup and configuration of the design flow, technology files and library data, accelerating the design team's time to results and easing re-use of the design environment from one project to the next.

As technology and library data are separated from design data, users can quickly retarget the design to an alternate process or library, re-using all or part of the design flow.

Separately maintained global and local scripts provide designer-level control of the design flow, enabling designers to modify or tune it to specific project needs.

The Pilot Design Environment is also architected to facilitate multiple-site chip development, using a standard data structure that enables geographically dispersed design teams to work within a common, version-controlled design infrastructure.

'With project members in multiple locations, having a single, uniform design environment is important to help ensure our team stays productive and avoids the problems associated with process and data inconsistencies'.

'The Pilot Design Environment provides that valuable common infrastructure', said Benny Chang, Vice President of Engineering at Tundra Semiconductor.

'Additionally, the environment is robust and repeatable, allowing us to accommodate late ECOs with minimal schedule impact'.

The environment is tapeout-proven at process nodes from 0.25um to 65nm.

It features implementation and functional verification flows, supporting the Discovery Verification Platform's VCS Native Testbench and Reference Verification Methodology (RVM), as well as the complete Galaxy Design Platform, including leading tools such as IC Compiler.

The environment can be customised to support third-party or customers' internally developed tools.

Advanced methodologies to address deep submicron design issues, such as timing, signal integrity, power, design for test, and design for manufacturing are incorporated into the design flow.

Utilities for technology file preparation as well as for qualifying and adjusting library and design data enhance the design team's productivity and help avoid downstream implementation problems by ensuring early and complete node, library and design information.

The Pilot Design Environment is also capable of capturing and reporting approximately 50 design and project-level metrics, providing a means for understanding current project status, evaluating the remaining time and resource requirements, and evaluating the impact to the design of changes to the flow or design data.

The ability to consistently monitor design characteristics and resource utilisation throughout the development process enables systematic improvements to the design flow.

Customers will be able to take advantage of the productivity gains realised in each new release of the Pilot Design Environment.

'With dozens of tapeouts to its credit, the Pilot Design Environment is a validated solution that designers can leverage to achieve tapeouts in a more efficient and predictable manner', said John Chilton, Senior Vice President and General Manager of Synopsys' Solutions Group.

'This offering combines Synopsys' unique expertise in tools, design flows, and chip design to help customers avoid common project bottlenecks and more productively focus on their designs and on whole product development'.

The Pilot Design Environment is deployed as a service by Synopsys Professional Services and is available now to early adopters.

Deployment service fees vary depending on the amount of customisation and associated project needs, and include the environment deliverables.

An annual support contract is required.

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