Product category: Design and Development Software
News Release from: Sandwork Design | Subject: SpiceCheck
Edited by the Electronicstalk Editorial Team on 12 July 2006
Netlist-driven rule checker
is fully programmable
SpiceCheck performs netlist debugging from syntax verification to circuit-aware static checking and allows SoC designers to perform a global check on traditionally difficult-to-find design issues
Related stories
Verifying and debugging mixed-signal designs
Tool in analysis verification and debugging (AVAD) suite for analogue and mixed-signal designs, performs transistor-level design rule screening from static connectivity to post-layout signal integrity
SpiceCheck does netlist debugging and verification
SpiceCheck is an analysis, verification, and debugging (AVAD) suite for analogue and mixed-signal designers
Sandwork Design has announced the release of SpiceCheck, its latest product in the company's AVAD suite for analogue and mixed-signal designers. SpiceCheck performs netlist debugging from syntax verification to circuit-aware static checking and allows integrated circuit (IC) and system on chip (SoC) designers to perform a global check on traditionally difficult-to-find design issues.
Today's low-power, high-speed chips commonly involve multi-rail voltage sources, internal charge pumps and multiple transistor process models.
These present verification challenges for designers to ensure that low-voltage devices are not present in high-voltage rails; that no leakage devices appear at multirail interface blocks; and, at the physical level, that no signal integrity problem remains as a result of high resistance capacitance RC parasitics.
While it is difficult to detect these problems with traditional dynamic Spice simulation, the SpiceCheck alternative allows designers to address these challenges with: programmable Tcl check commands for full customisation flexibility; design traversal at subcircuit blocks or individual transistor level for device properties inquiry; topology-matching capability to automatically search for critical circuit blocks in a flat or hierarchical target design; full chip static bias range estimation with the flexibility to include user-defined internal supply nets; ideal-to-DSPF net name mapping functions and a solver to calculate parasitic resistance between arbitrary extracted nets; and integration to Sandwork ACE waveform functions for dynamic waveform data probing.
Further reading
Analysis software makes sense of scope data
Spice Explorer and WaveView Analyzer 2006.1 implements new oscilloscope waveform data reading capability and the option to display multiple IBIS models
Software makes sense of mixed-signal simulations
Two new products analyse the enormous amounts of data generated during the post-layout simulation of systems on a chip and integrated circuits
SpiceCheck is the only netlist-driven tool for electrical rule checking that is fully programmable.
'From our active conversation with designers, it became clear that there are as many different rule-checking requirements as there are different design segments, even though their are common needs, such as constant-on transistor checks', said Jack Yao, CEO of Sandwork.
'Our approach has been to provide common utilities for immediate interactive use while provide powerful programmability for custom applications to satisfy the most challenging situations'.
SpiceCheck will be demonstrated in Booth 3325 at DAC 2006.
US pricing begins at $18,000 for a one-year time-based licence.
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