Free workshop explains STM design

One-day event in conjunction with ST Microelectronics and Hitex will introduced to the STM32 microcontroller's system architecture, including an overview of its peripheral set.

RS Components is hosting a free customer workshop at The Premier Inn (formerly Tulip Inn), Old Park Lane, Trafford Centre, Manchester on 9th September 2008.

Created with the design engineer in mind, the one-day event is being held in conjunction with ST Microelectronics and Hitex.

Delegates will be introduced to the STM32 microcontroller's system architecture, including an overview of its peripheral set and ARM's new Cortex-M3 Macrocell.

The STM32 device consumes only 36mA, making it well suited for battery-operated applications, operating from a 2.0 to 3.6V power supply drawing just 2uA in standby mode.

It is up to 30% faster at processing than equivalent ARM7TDMI-based products.

The microcontroller provides designers with the ability to reduce code sise by 45%, via the use of the Thumb 2 instruction set.

The device is particularly well-suited for use in portable applications, where low power consumption is important, but it can also be used in traditional applications.

The Cortex-M3 is based on ARMv7-M architecture on a three-stage pipeline able to deliver 1.25DMIPS/MHz.

It combines the Thumb2 instruction set with unaligned data and storage and atomic bit manipulation.

The integrated nested vectored interrupt controller (NVIC) offers deterministic, low latency interrupt handling through tail-chaining technology and can be configured for up to 240 interrupts.

For safe operation in industrial control applications, the optional memory protection unit (MPU) enables secure operation through privileged access modes and the separation of processes in an application.

The Flash patch and breakpoint (FPB) unit, data watchpoint and trace (DWT) unit, instrumentation trace macrocell (ITM) and the optional embedded trace macrocell (ETM) offer low-cost debug and trace capabilities.

Extensive clock gating technology and integrated sleep modes enable low power designs.

Each section of the workshop will be accompanied by hands-on exercises using the industry leading MDK-ARM toolset from Keil.

Engineers will move through the creation of a project to handling features, such as the Cortex interrupt structure, the STM32 DMA and peripherals.

More advanced topics, like using a real-time operating system, will also be covered.

Examples will be executed using both simulation and hardware debugging techniques.

It is assumed that participants will have a basic understanding of microcontrollers and a working knowledge of the C programming language.

The Keil microcontroller development kit, the real view compiler and debugging tools will be discussed with a view to software development via building a first project and debugging using software simulation, JTAG and the STM32 debug enhancements.

An in depth understanding of the STM32 system architecture will be gained through a study of its bus structure, memory map and boot modes, clock tree and PLL, low power modes and the DMA controller.

How to use the STM32 peripherals to maximum effect will also be demonstrated.

The event will conclude with ideas on harnessing the power of the STM32, the ST library, using a small footprint real-time operating system and how to add gigabytes of low cost storage.

Delegates should register in advance on the RS website, and must being their own laptops as these will not be provided.

Back to top