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Product category: Memory Devices and Modules
News Release from: Fujitsu Microelectronics Europe | Subject: MBM29LP64xUxM
Edited by the Electronicstalk Editorial Team on 16 May 2002

Big Flash memories
use novel multibit cells

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Fujitsu Microelectronics Europe has released the first 64Mbit NOR-type Flash memory devices based on its MirrorFlash multibit cell architecture

The four 64Mbit Flash memory devices (MBM29LP640UHM, MBM29LP640ULM, MBM29LP641UHM and MBM29LP641ULM) will be the first offered with the MirrorFlash technology - the former two in 56-pin TSOPs and the latter two in 48-pin TSOPs. Samples are available now and volume production is expected to commence Q1FY03.

Fujitsu's new MirrorFlash devices respond to recent performance improvements in products such as mobile phones, laser printers, and car-navigation systems, which have brought significant increases in program size and data size requirements.

This has resulted in demand for Flash memory with higher speed, greater density and smaller physical size.

MirrorFlash memory architecture adopts a new multibit cell technology incorporating a proprietary cell design.

It represents a significant improvement over the existing floating-gate single-bit cell and the more advanced floating-gate multibit (multilevel) cell architectures.

Unlike single-bit floating-gate cells, the MirrorFlash architecture traps electrons on two sides of the insulated layer of a single physical cell, forming two electron 'spots' and thereby enabling a cell to store two bits of data.

In addition, compared with the single-bit and multibit floating gate architectures, the new cells are easier to produce, and cell size can be reduced.

Thus, using stable, existing process technology, it is possible to rapidly achieve higher density comparable to that of chips produced with next-generation process technology.

The new architecture is also more reliable than the multi-level cell architecture, because electrons are trapped in a fixed location on the insulating layer.

The new products use a 2bit-per-cell architecture to achieve quick read performance of 90ns initial access and 25ns page-mode access.

These products feature 32byte or 16-word simultaneous write-buffer programming for greatly improved write performance.

They also offer Hi-ROM security to prevent unauthorised copying, and an accelerator to shorten write times to 60% of those previously typical, when loading the system.

These new devices work with the same command sequences as Fujitsu's other Flash-memory products.

Pin-compatible with the company's MBM29DLxxx family, which are designed with the floating gate single bit architecture, customers can make the transition to high-density MirrorFlash products without major design changes.

Additionally, there are 128Mbit as well as greater and lower density models for the MirrorFlash family in the pipeline.

In addition to developing MirrorFlash memory family products, Fujitsu will continue to develop faster conventional single-cell floating gate products using the latest process technologies.

(This was Electronicstalk's Top Story on 16 May 2002)

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