Product category: Intellectual Property Cores
News Release from: Fujitsu Microelectronics Europe
Edited by the Electronicstalk Editorial Team on 23 April 2007
Jitter suppression verified
for mixed-signal ICs
Fujitsu Microelectronics Europe has been working with London-based Toric to verify embedded jitter-suppressing macros based on Anti-Jitter Cell technology
Fujitsu Microelectronics Europe (FME) and Toric, a London-based technology licensing company and the supplier of PhaseFiltertm, have revealed the results of their collaboration to verify embedded jitter-suppressing macros based on Toric's patented AJC (Anti-Jitter Cell) technology. AJC technology provides the foundation for Toric's first product, PhaseFilter a low-power, on-chip circuit for the suppression of jitter in clock signals.
This article was originally published on Electronicstalk on 23 April 2007 at 8.00am (UK)
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The design uses only generic building blocks and so can readily be implemented in a wide range of semiconductor technologies.
On a typical advanced mixed-signal CMOS process, with an operating frequency in excess of 1GHz, macros with a 2:1 tracking range and -150dBc/Hz plateau noise (far from carrier) are achievable.
PhaseFilter can enhance the performance of ICs in a wide range of applications including RF (LO) synthesis, serial communications, low-power PLLs and digital audio.
Direct benefits include reduced system power and silicon area.
Equally important is the potential for lower bill of material (BoM) costs and shorter development cycles, both of which enable significant reduction in total solution cost compared with conventional jitter suppression techniques.
Professor Mike Underhill, Toric's Research Director, said: 'These impressive results confirm the efficacy of our technology in such applications as low power PLLs and fast high-resolution data convertors'.
'Since these areas are central to FME's 'right-sized solutions strategy' we are pleased that their faith in our technology has been rewarded by such a positive result'.
FME's latest test chip, implemented in 90nm technology, demonstrates jitter suppression of 6:1 at 500MHz.
Neil Amos, Senior Director Engineering at Fujitsu Microelectronics Europe, added: 'This implementation of Toric's AJC technology is a key milestone in FME's plans to deliver real customer benefits through the integration of PhaseFilter in future mixed-signal products'.
A PhaseFilter Developers' Pack is available from Toric.
The reference design and simulation tools enable designers to incorporate Toric's AJC technology into their own products by creating, optimising and verifying embedded macros for jitter suppression which deliver high performance, with low power and are area-efficient.
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