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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: UltraSim
Edited by the Electronicstalk Editorial Team on 30 May 2003

Fast-Spice simulator takes
on mixed-signal design

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Cadence is expanding into mixed-signal designs with its newly enhanced Cadence UltraSim Fast-Spice simulator

Cadence Design Systems is expanding into mixed-signal designs with its newly enhanced Cadence UltraSim Fast-Spice simulator. Cadence chose memory design as its first target application because of its extreme speed and capacity requirements. UltraSim's new best-in-class post-layout capabilities - including RC reduction and extraction-independent hierarchical stitching - now make it an ideal choice for mixed-signal designs as well.

Ricoh Corporation in Japan, IDT-Newave in China and Faraday Technology Corporation in Taiwan are all now reaping the performance benefits of Cadence UltraSim.

The UltraSim full-chip, transistor-level, Fast-Spice technology is well known for providing extremely high speed while maintaining near-Spice accuracy.

Cadence obtained UltraSim through its acquisition of Celestry in January this year, and already has fully integrated it into the Cadence analogue design Environment (ADE) - the industry standard environment for custom design.

Additional enhancements include Cadence Spectre netlist and model compatibility and support for TFT models used for plasma/LCD display simulation.

"For us, it's all about speed.

UltraSim has increased our productivity 10x by providing us a way to accurately simulate our large mixed-signal blocks in a fraction of the time required by conventional methods", said Oka-san, CAD Manager at Ricoh.

"UltraSim effectively addressed our capacity and performance problems when previous generation methods become impractical due to design size and complexity".

UltraSim enables design teams to verify circuits an order of magnitude or more faster than would otherwise be possible, but capacity is also critical.

Traditional Spice simulators and other Fast-Spice or FastMOS simulators cannot handle very large circuits, let alone complete chips.

The result is often respins to fix problems between circuit blocks within an IC.

With UltraSim's superior capacity, design teams can catch such problems prior to tapeout, saving costly respins and weeks or months in time-to-market.

"We used UltraSim to reconfigure an extremely complex communications chip", said Howard Yang, General Manager of IDT-Newave, and winner of the prestigious IEEE award 2002 Pioneer Award.

"UltraSim from Cadence won hands down in benchmarks against the competition.

It provided us with accurate, faster Spice-like simulation of a wide range of applications from verification of SRAM memories to full SoCs.

UltraSim has provided us with significantly more confidence in our final tapeout".

"After conducting solid technical research, we chose Cadence's UltraSim Fast-Spice simulator because of its incomparable ability to address the simulation speed and design capacity issue quickly", said Dr Jim Wang, Director of Design Development Department at Faraday Technology Corporation.

"We are very confident of Cadence's roadmap as it has been renowned in providing solutions for memory IP design, while it keeps providing users a better design and verification environment".

"Cadence has integrated the superior UltraSim Fast-Spice technology quickly into our industry leading custom design environment", said Yaakov Milstain, Corporate Vice President and General Manager of Custom IC Solutions at Cadence.

"These early customer wins are strong evidence of its superior value for memory and mixed-signal design.

UltraSim has become a lynchpin technology for nanometre-scale circuit verification".

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