Start with the news release Software specialises in structured ASIC design from Synplicity, which we summarised at the time by saying "An enhanced version of the Amplify physical synthesis software suite features additional customisations for NEC Electronics' ISSP structured ASIC devices.". Several months prior to that, we featured the news release Serial RapidIO IP is proven in silicon from Jennic: "Jennic has successfully demonstrated its Serial RapidIO IP operating in conjunction with solutions from other RapidIO vendors.".
 
In February 2005, we covered the news from Cypress Semiconductor - take a look at Kits offer low-cost intro to PSoC development which says: "Cypress MicroSystems has released three inexpensive development kits for its PSoC programmable system-on-chip mixed-signal array devices.".
 
Take a look also at the news release from Synplicity, Software speeds structured ASIC design, as well as Timing estimation to become placement aware from Synplicity, and Sensitive approach enables tight timing closure from Synplicity.