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Product category: Design and Development Software
News Release from: Synplicity
Edited by the Electronicstalk Editorial Team on 30 April 2003

Physical synthesis to incorporate
prototyping

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Synplicity is to develop ASIC physical synthesis technology which brings together the benefits of physical synthesis and silicon virtual prototyping into one tool environment.

Synplicity has a new strategy to develop ASIC physical synthesis technology which brings together the benefits of physical synthesis and silicon virtual prototyping into one tool environment Synplicity believes its physical synthesis technology will be an ideal solution for the gate-level netlist handoff market - where designers pass their designs to either internal or external organisations for the back-end design work - and for the emerging "structured ASIC" market - led by Synplicity partners such as Lightspeed Semiconductor, LSI Logic and NEC Electronics

Currently, ASIC designers must use two separate and disjointed technologies to achieve timing closure: silicon virtual prototyping to define a floorplan that can be physically implemented, and physical synthesis to deliver a gate level netlist along with a legal placement.

This current approach has been difficult for many designers to use