Start with the news release Edxact highlights debugging tools at DAC 2010 from Edxact, which we summarised at the time by saying "Post-layout verification specialist Edxact is to showcase the latest enhancements of its parasitics reduction and analysis tools at the European EDAVillage at DAC 2010.". Several months prior to that, we featured the news release Pathfinder address reliability in nanometer design from Apache Design Solutions: "Apache Design Solutions has announced Pathfinder, a full-chip electrostatic discharge (ESD) physical integrity solution to address the reliability challenges faced by nanometer designs. ".
 
In July 2009, we covered the news from Synopsys - take a look at In-Design Rail Analysis verifies power networks which says: "Synopsys has introduced its In-Design Rail Analysis capability to accelerate design closure. ".
 
Take a look also at the news release from Cadence Design Systems, Multicore design optimises ARM performance, as well as EM simulator spreads coverage from Ansoft Europe, and Op amps meet military specifications from Intersil.