UMC adopts thermal verification

UMC is to implement Gradient Design Automation products into an IC thermal verification flow, with the goal of ensuring that customer designs will operate within their temperature specifications.

UMC is to implement Gradient Design Automation products into an IC thermal verification flow, with the goal of ensuring that customer designs will operate within their temperature specifications.

With increasing performance and circuit densities, system-on-a-chip (SoC) and custom designs are experiencing bigger temperature variations across the die.

Gradient's three-dimensional thermal analysis technology, which is fine-grain, accurate and scalable for the latest chip designs, can be integrated into UMC's existing nanometre design flows.

Gradient's products are designed to help users accurately identify possible thermal violations and to more accurately determine the thermal effects on critical aspects such as timing, leakage and electromigration - thermal impacts that can be missed with today's uniform die-temperature methodology.

"Gradient's technology is poised to help designers ensure that their silicon operates within temperature specs, and thus makes a good addition to our portfolio", said Dr Long-Ching Yeh, Vice President of UMC's EDA tool and DFM support.

Gradient is focused on providing mutual customers with access to design kits and flows for various process nodes, including UMC's proven 65nm process.

The first flow, based on Gradient's FireBolt product, has been applied to a test chip produced on UMC's 90nm process node.

A future effort focuses on 65nm design flow development, including thermal impact on timing.

"By taking into account UMC's foundry data, detailed package characteristics, power values and design layout information, a detailed thermal profile of the design can be quickly produced for all the operating modes of the chip, in order to identify temperature hotspots and simulate their impact", said Edmund Cheng, President and CEO of Gradient.

"We are currently in discussions with a number of fabless companies that are interested in thermal verification, and require thermal techfile data from foundries".

"Thus we are excited to work with UMC to offer our technology as part of their flow".

Through collaboration with UMC, Gradient is developing thermal-aware design flows to build on existing "worst-case temperature" design approaches.

The worst-case temperature approach, along with other process on-chip variations (OCV), can result in very expensive design margins.

By providing access to the deterministic picture for on-chip temperature, designers can better guide the placement of sensitive circuit elements, such as thermal sensors.

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