News Release from: Apache Design Solutions
Edited by the Electronicstalk Editorial Team on 24 July 2006
Electrothermal software aids SoC reliability
Novel software assesses the effect of SoC temperature on leakage, timing, reliability and voltage drop.
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Apache Design Solutions has announced Sahara-PTE, a fully integrated electrothermal solution for SoC temperature's impact on leakage, timing, reliability and voltage drop. Sahara's tightly integrated power-thermal-electrical (PTE) analysis deliver accuracy, capacity, performance and ease of use for fast convergence of power and thermal distribution. Sahara-PTE expands Apache's Silicon Integrity Platform of power integrity with RedHawk and timing/noise integrity of PsiWinder.
The layout-driven platform encompasses self-consistent flow of built-in power/thermal/noise library and custom macro characterisation, incremental RLC extraction, high-capacity network solver, timing impact modelling, and fix and optimisation (FAO).
For designs at 90nm and below, managing leakage current has become one of the key design challenges.
To accurately analyse chip leakage, the designers need to consider the temperature variation of the chip based on transistor switching current.
Sahara offers the industry's first fully integrated power-thermal iterative solution, based on its 3D thermal model and RedHawk' s silicon proven high-capacity simulation kernel.
It takes in the location-based boundary temperature conditions or extracted package thermal model for fast and accurate power-thermal convergence.
Chip temperature also affects the metal resistivity, interconnect self-heating, and voltage drop across the design.
Based on the converged power-thermal distribution, Sahara-PTE subsequently analyses the impact on resistance extraction, wire electromigration, and voltage drop.
By considering the temperature variation across the chip instead of using constant corner values, Sahara-PTE also provides a much more accurate full-chip, critical path, and clock timing for silicon sign-off.
'Apache continues to lead the market in addressing the critical design needs as we move toward 65 and 45nm processes', said Andrew Yang, CEO of Apache.
'Our new product enables IC designers to better understand the temperature impact on their designs, as well as the system designers to make package and board selections tradeoffs'.
'Sahara-PTE is Apache's commitment to expand our solutions for critical silicon integrity signoff'.
Sahara-PTE will be available this quarter for production use.
Annual licence pricing starts at US $160,000 list.
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