Xilinx FPGAs feature optimised jitter performance

Xilinx has announced the availability of Virtex-6 HXT FPGAs optimised for applications that require ultra-high-speed serial connectivity.

Virtex-6 HXT FPGAs support 40Gbps and 100Gbps line cards with flexible port configurations including 1x40Gbps, 4x10Gbps, 1x100Gbps and 10x10Gbps.

They also support long reach optical requirements of next-generation communications equipment without the need for external re-timer circuitry through strong transceiver jitter performance.

Xilinx has validated Virtex-6 HXT FPGAs interoperability with optical transceiver suppliers including Avago Technologies.

These Virtex-6 HXT devices interface to industry-standard SFP+, XFP and CFP optical modules at line rates up to 11.18Gbps addressing next-generation optical transport application needs.

Through its jitter performance of sub 500fs rms random jitter at 11.18Gbps alongside the device's signal integrity, the need for external conditioning circuitry is eliminated.

Virtex-6 HXT FPGAs offer high serial bandwidth through a combination of 6.6Gbps GTX transceivers and 11.18Gbps GTH transceivers to enable next-generation packet and transport, switch fabric, video switching and imaging equipment.

To enable these applications, Virtex-6 HXT devices also feature a ground-up design that is optimised for 10G signalling, including Transmit (Tx) pre-emphasis, Receive (Rx) linear equalisation and Decision Feedback Equaliser (DFE) to meet the tough jitter requirements.

Other features include: lower jitter with superior DFE and EQ circuits, higher total transceiver count, more BRAM and high number of Serdes capabilities.

The design topology isolates the high-performance analogue circuits from the noisy digital logic and IO.

The ground-up package has all serial pins isolated from parallel IO, in-package power planes and capacitors.

These features coupled with a sparse-chevron pinout results in 40dB of isolation between Tx and Rx and 30dB of isolation between channels.

The overall HXT performance enables the designer to interface to optical modules directly without the need for external re-timers.

Built on 40nm process using third-generation Xilinx ASMBL architecture, the Virtex-6 FPGA range is supported by a set of development tools and a vast library of IP to ensure productive development and design migration.

The devices operate on a 1.0v core voltage with an available 0.9v low-power option.

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