Xilinx introduces field-programmable gate arrays

Xilinx has introduced a series of field-programmable gate arrays (FPGAs), enabling developers to implement programmable solutions in portable ultrasound equipment and automobile infotainment systems.

The FPGA series reduces total power consumption by 50 per cent and offers capacity of up to two million logic cells on the unified architecture that scales across low-cost to ultra-high-end ranges, according to the company.

Xilinx 7 series FPGAs further extend the range of applications that programmable logic can address by solving challenges for low power and cost without compromising on high capacity and performance.

The new FPGAs are implemented on 28nm process technology optimised to deliver low power with high performance.

The 28nm devices extend Xilinx's Targeted Design Platform strategy introduced with the 40nm Virtex-6 and 45nm Spartan-6 FPGA ranges that are now in volume production.

The Targeted Design Platform strategy combines FPGAs, ISE Design Suite software tools and IP, development kits and targeted reference designs to enable customers to leverage their existing design investments and reduce their overall costs.

In this new generation, the company expands the ecosystem of available IP and designs that enable customers to focus on differentiation even as they transition to 28nm devices.

The new FPGAs enable developers to implement programmable solutions in a range of systems that had previously only been achievable in ASSPs or ASICs, including portable ultrasound equipment consuming less than 2W and automobile infotainment systems driven by 12V, as well as low-cost LTE baseband and femtocell base stations.

Xilinx has minimised total power by adopting a high-K metal gate (HKMG) process optimised for low static power consumption.

Working with its foundry partners, the company helped define the new process to achieve FPGA performance requirements, while lowering static power consumption by 50 per cent compared with the alternative 28nm high-performance process.

Xilinx then applied architectural enhancements to lower dynamic power consumption both for logic and input/output (I/O), while also introducing clock-gating technology with the release of ISE Design Suite 12.

The company claims that the result is an FPGA series that provides 50 per cent lower total power consumption compared with Virtex-6 and Spartan-6 FPGAs and 30 per cent lower than alternative 28nm FPGA device ranges.

The lower power consumption not only enables FPGAs to target new applications, it also allows Xilinx to deliver usable performance in 28nm-generation devices.

This means designers can take advantage of up to 4.7TMACS in DSP performance symmetric mode (2.37TMACs in non-symmetric mode) and two million logic cells at clock speeds of up to 600MHz.

They can also achieve up to 2.4tbps high-speed connectivity.

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