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Product category: Design and Development Software
News Release from: Synopsys | Subject: DFT MAX
Edited by the Electronicstalk Editorial Team on 3 April 2006

Synthesis software cuts test
costs of graphics ICs

Nvidia Corporation has adopted Synopsys DFT MAX test synthesis with adaptive scan technology for its next-generation graphics processor chips

Nvidia Corporation, a worldwide leader in graphics and digital media processing, has adopted Synopsys DFT MAX test synthesis with adaptive scan technology for its next-generation graphics processor chips. Reducing test costs while improving test quality was a driving factor in the adoption of DFT MAX.

Proven on multiple 130, 90 and 65nm designs, DFT MAX consistently delivers predictable test cost reduction in an easy-to-use synthesis solution.

'We began working closely with Synopsys on advanced test synthesis and test compression technologies after encountering the limitations of traditional test methodologies as applied to our high-volume, high-performance products', said Dan Smith, Director of Hardware Engineering at Nvidia Corporation.

'In order to test for transition and bridging on our sophisticated graphic processors in 130nm, 90nm and smaller process geometries, we required the adaptive scan technology in DFT MAX'.

'Using DFT MAX as part of our Design Compiler synthesis flow reduced expensive test time and data volume by 10x without adversely affecting our strict timing requirements'.

Working seamlessly with the Design Compiler flow, DFT MAX predictably reduces test costs by up to 50x compared with traditional scan techniques.

The key advantage of DFT MAX is that it is easy to implement and is far less intrusive on design flows and design performance than alternative solutions.

Design Compiler and DFT MAX are an integral part of Synopsys' Galaxy Design Platform, which gives engineers a single design environment for synthesis, physical implementation and signoff.

Concurrent optimisation for timing, area, power and test within the Galaxy environment eliminates costly and time-consuming design iterations between front-end and back-end flows.

'At Synopsys, we continually focus on improving our tools and flows to increase customer productivity and lower their costs of design and test', said Graham Etchells, director of marketing, Synopsys Implementation Group.

'DFT MAX is a prime example of this focus'.

'It delivers the significant test cost reduction needed for today's designs, while providing compression that's easy to implement due to its seamless integration with the Design Compiler flow'.

'We are encouraged to have Nvidia as one of our early customers deploying this unique capability on highly complex graphics processor designs'.

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