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Product category: Design and Development Software
News Release from: Synopsys | Subject: Design Compiler 2002.05
Edited by the Electronicstalk Editorial Team on 28 May 2002

Faster-running RTL synthesis solution

Design Compiler 2002.05 is the latest and most powerful version of the RTL synthesis solution from Synopsys

For over a decade, hardware designers have relied on Design Compiler (DC) to create the vast majority of ICs around the world. Driven by ever-increasing design challenges, Design Compiler has seen continuous improvement over the years, leading up to this latest release which delivers up to 2x faster run times, 15% higher circuit speed, and 14% smaller area.

Today, designers use Design Compiler for a broad range of ICs, spanning diverse applications.

Their designs vary from large multi-million-gate high-speed designs to area- and power-efficient designs.

The DC 2002.05 release benefits the entire design spectrum.

At the high end of chip design, customers' most pressing needs are quality of results, scalability for large designs and timing closure.

For timing closure, Synopsys' Physical Compiler is built on top of, and directly benefits from improvements in Design Compiler.

Both Design Compiler and Physical Compiler take advantage of the scalable flow and quality-of-results improvements in DC 2002.05.

For example, designers can see more than tenfold improvement in the size of the largest synthesisable designs, stemming from memory usage improvements in DC2002.05, including interface logic models, 64bit support, and further automated divide-and-conquer flow.

Today's mainstream designs have an increasing requirement for arithmetic optimisations because these functions often determine the overall performance of the device.

This new release addresses this requirement with improved capability in DC Ultra, leveraging best-in-class datapath generation techniques popularised by the specialised datapath engine in Synopsys' Module Compiler.

All users designing large, medium or small designs benefit from ease-of-use and runtime improvements of both compile and re-optimisation in the new release.

"Our customers rely on the strength of Synopsys synthesis to build their business", said Sanjiv Kaul, senior vice president and general manager, Physical Synthesis at Synopsys.

"The Design Compiler R and D team has an outstanding record in the industry, and has been publicly recognised for their exemplary performance which continues to earn the trust of Synopsys customers.

DC 2002.05 is the latest result of this persistent customer focus".

DC Ultra 2002 consistently delivers faster and smaller circuits, easier With DC Ultra 2002.05, a new set of optimisations that combines the benefits of resource sharing with the implementation of high-performance arithmetic components, results in an average of 10% faster and 14% smaller datapath circuitry without requiring the user to issue any additional commands.

A fully automated extraction of finite state machine (FSM) logic and a targeted set of optimisation techniques deliver an average of 14% faster and 16% smaller FSM circuitry.

Many designers today use gated clocks to reduce the power consumption of their designs.

The new release allows them to benefit from the performance improvements of automated register retiming combined with the power savings of clock gating.

With the 2002 release, realising the full strength of DC Ultra is extremely easy.

A new DC Ultra command, 'compile_ultra', encapsulates both the new and existing DC Ultra optimisation capabilities to deliver an average of 11% faster designs.

"Design Compiler scripts are a standard deliverable we ship with our cores", said Larry Hudepohl, Engineering Director for synthesisable cores, MIPS Technologies, "Our customers rely on these scripts to deliver the best results and the fastest runtimes from Design Compiler.

With the new DC2002.05 compile_ultra command, we achieved 2x faster runtime on the MIPS32 4Kec core with a much simplified synthesis methodology, while maintaining equivalent quality of results relative to the previous release of Design Compiler.

This release will boost productivity, significantly reduce the script development effort, and improve synthesis runtimes for MIPS Technologies and our customers".

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