Product category: Design and Development Software
News Release from: Synopsys
Edited by the Electronicstalk Editorial Team on 26 April 2002
Synthesis speeds Fujitsu ASIC sign-off
Fujitsu has integrated Synopsys Physical Compiler into its latest ASIC design flow, the CS81 series of 0.18-micron standard cells
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Physical Compiler's unified synthesis and placement capability allows all aspects of synthesis, from architectural exploration to structuring and optimisation, to have access to accurate placement-based interconnect delay information, instead of approximations from traditional wire load models.
Availability of the latest Fujitsu ASIC libraries for Physical Compiler will allow Fujitsu ASIC customers to run placement themselves before handing off the design to the Fujitsu.
With this flow in place, Fujitsu expects to save weeks to months in design time to close post-route timing.
"Based on customer demand, Fujitsu has made a significant investment in creating proven flows that support the most complex designs", said Moriyuki Takamura, general manager of Fujitsu, System LSI and ASIC division "We are confident that the integration of Physical Compiler in our design methodology will be critical to significantly reducing turnaround times and accelerating time-to-market for our mutual customers".
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"Working on challenging ASIC designs has required costly and time-consuming iterations to achieve timing closure", said Yoichi Kawabata, deputy group executive, Platform Technology Development Headquarters, Canon.
"With the adoption of the industry-leading physical synthesis tool, Physical Compiler, in the Fujitsu ASIC flow, we are confident we will be able to accelerate timing closure, achieve smaller die size and get our complex, high-performance ASIC designs to market on time".
"Having a leading ASIC vendor like Fujitsu support Physical Compiler means customers will be able to get their designs to market more quickly and reliably", said Sanjiv Kaul, senior vice president and general manager, Physical Synthesis business unit, Synopsys.
"Synopsys' Physical Synthesis is setting the standard for achieving timing closure, as evidenced by the support of world-class companies like Fujitsu".
(This was Electronicstalk's Top Story on 26 April 2002)
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