Study looks at FPGA-based signal processing: News from RF Engines

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RF Engines has recently been contracted by the Naval Systems Department of Defence Science and Technology Laboratory, an agency of the UK MoD, to carry out a study into advanced FPGA-based signal processing architectures. The study focused on the application of mixed-radix FFT architectures and their efficient implementation on FPGA devices for various applications including a very wideband receiver system capable of detecting, characterising and direction finding a variety of types of radio signal. Mixed-radix FFTs adopt non-power-of-two techniques in order to exactly match the number of points required for the application.

In carrying out the study, RF Engines made use of its significant expertise in the design of frequency transformation architectures and their efficient implementation in FPGA devices.

The company had previously designed and implemented several mixed-radix cores to meet requirements for nonpower-of-two length DFTs (discrete Fourier transforms).

The study also investigated the requirements for storage of data, the impact on target hardware, as well as the physical implementation of the cores on COTS hardware platforms.

The incorporation of other post-processing blocks into the FPGA also formed part of the study.

John Summers, RF Engines' CEO, commented: 'We are obviously very pleased to be doing this sort of work for the MoD, and looking forward to this work being pulled through into end product very quickly'.

'The benefits of this approach are the ones that you're always seeking - lower cost equipment for the end customer and also achieving a significant improvement in operational performance - both in one hit'.

Peter Beharrell, EW Fellow at the Defence Science and Technology Laboratory, said: 'RF Engines conducted a timely and thorough study into our DSP requirement'.

'The study contributed significantly to a favourable overall concept assessment'.

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Study looks at FPGA-based signal processing

RF Engines has been contracted by the Naval Systems Department of Defence Science and Technology Laboratory to carry out a study into advanced FPGA-based signal processing architectures.