ECL devices feature femtosecond-class jitter

A new family of ECL devices is targeted at OC-48 grade applications such as routers, switches and 3G basestations where jitter management is a critical issue in overall system performance.

ON Semiconductor has released three ECLinPS MAX devices - the first members of a new family of emitter coupled logic (ECL) devices targeted at OC-48 grade applications such as routers, switches and 3G basestations where jitter management is a particularly critical issue in overall system performance.

The ECLinPS MAX devices offer 200fs typical jitter performance and are targeted specifically at clock distribution functions, a major source of signal distortion in these types of high-speed communications systems.

"Every high-speed serial link designer struggles to meet a total jitter budget", said Dr Howard Johnson, noted author of "High-speed digital design: a handbook of black magic" and "High-speed signal propagation: advanced black magic", a signal integrity columnist for EDN, and a technical workshops instructor for digital engineers at Oxford University.

"Anything that provides more margin in that budget helps".

"Low-jitter clock distribution definitely relieves pressure on the jitter budget - making the rest of the design that much easier".

The ECLinPS MAX family of devices offer a highly flexible means to route clock and data signals through ultra precise system designs and across backplanes, functioning as translators, receiver/drivers and clock distribution products.

The outstanding jitter performance of the devices allows designers to: increase the depth of their clock trees while staying well within jitter budgets; minimise the possibility of incorrect data latching; increase likelihood of maintaining lock on clock sources; and improve the speed of obtaining lock after a field board swap.

The NB6L11 1:2 differential fan-out buffer is ideal for applications requiring very fast AC performance and features 160ps typical propagation delay and supports input clock frequencies greater than 6GHz and maximum input data rates typically greater than 6Gbit/s.

Typical RMS jitter for this device is 200fs.

The NBL16 1:1 differential fan-out buffer offers similar input clock and data range specs and has an input propagation delay spec of 135ps.

With output transition times of 70ps it is ideally suited for interfacing with high-frequency and low-voltage (2.5V) sources.

Typical RMS jitter for this device is 200fs.

The NB6L239 differential clock divider is an advanced clock distribution IC with dual divider outputs, allowing for two separate clock signals to be distributed from a single reference input.

The first division bank offers divide by 1, 2, 4, and 8 ratios while the second provides divide by 2, 4, 8, and 16 ratios.

This allows an external 622MHz reference to be used to generate 38.8 to 622MHz outputs.

Additionally, the NB6L16 and NB6L11 are pin-for-pin upgradeable from their predecessor ECLinPS Plus versions.

Increasingly, networking and server designers are forced to make trade-offs between excellent jitter performance and affordability in their choice of ECL devices.

The new ECLinPS MAX family of products delivers AC performance - specifically outstanding jitter and skew that is closer to ON Semiconductor's industry leading, highest performance silicon-germanium-based GigaComm devices, but at a price-point much closer to the company's standard bipolar ECLinPS Plus family.

As an added benefit to designers with limited power budgets, the new devices consume up to 50% less power than the company's highest performing devices.

The NB6L11 and NB6L16 are packaged in the 8-pin, SOIC package and priced at $3.55 per unit in 10,000 unit quantities.

The NB6L239 is available in a 16-pin QFN that measures 3 x 3mm and priced at $4.60 per unit in 10,000 unit quantities.

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