Product category: Communications ICs (Wired)
News Release from: National Semiconductor | Subject: DP83864
Edited by the Electronicstalk Editorial Team on 29 September 2003
Gigabit Ethernet transceiver integrates
four ports
A new highly integrated quad Gigabit Ethernet physical layer transceiver aims for multiport small office/home office switches, high density enterprise switches and router applications.
A new highly integrated quad Gigabit Ethernet physical layer (PHY) transceiver aims for multiport small office/home office (SOHO) switches, high density enterprise switches and router applications This new single-chip PHY leverages an on-chip microcontroller, providing the Gigabit Ethernet market with both flexible feature support and protection against future system requirement changes
This article was originally published on Electronicstalk on 5 Jan 2001 at 8.00am (UK)
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National Semiconductor's DP83864 four-port GigPhyter V device makes use of an integrated on-chip microcontroller - unique to the Gigabit Ethernet market - and enables system developers to quickly customise and enhance their designs.
Features like multiple LED control, cable diagnostics, or emerging applications like IP phone detect can be added through simple software modifications.
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Other solutions require a silicon spin or additional external logic for such changes, hurting time-to-market and adding risk and cost to the total system bill of materials.
At the heart of the DP83864 is the GigPhyter V core powering the company's fifth generation Ethernet transceivers.
With extensive field and laboratory proven interoperability, this ultrasmall and ultra-low-power core delivers high performance and exceptional reliability.
Each of the device's four fully featured Gigabit ports supports 10Base-T, 100Base-TX and 1000Base-T Ethernet protocols, ensuring a cost effective, smooth migration path from existing Fast Ethernet applications.
The cable performance exceeds IEEE requirements to provide headroom and tolerance for lower quality network cable.
"National Semiconductor has been a member of several consortiums at the InterOperability Laboratory for over 10 years", said Gerard Nadeau of the University of New Hampshire's InterOperability Lab.
"Products tested at the InterOperability Laboratory like National's Quad DP83864 GigPhyter V device help ensure interoperability for all members of the Gigabit Ethernet community".
The GigPhyter V family leverages National's heritage using innovative analogue design techniques compared to traditional DSP-centric architectures.
For example, the family provides an optimum mix of analogue signal conditioning in concert with DSP to minimise databus width while maximizing signal conditioning.
This approach produces a smaller and lower power DSP resulting in reduced power consumption and enabling a low cost packaging.
"The DP83864 represents yet another industry-leading product created from our highly re-usable and optimised GigPhyter V core", said Jeff Waters, product line director of National Semiconductor's networking division.
"Its proven interoperability and the flexibility it enables in system design is assisting our customers in getting compelling products to market quickly".
Ideally suited for L2 to L4 switch design, the IEEE802.3-compliant DP83864 interfaces directly to the media access controller (MAC) layer through either a MII, GMII, RGMII, or SGMII interface.
The device features IEEE802.3u auto-negotiation and parallel detection for seamless plug-and-play configuration.
It requires only two power supplies, 1.8V for core and analogue and 2.5V for analogue and I/O, simplifying board design.
The DP83864 quad GigPhyter V transceiver is offered in a 292-pin plastic ball grid array (PBGA) package.
Evaluation boards and complete reference designs are available today.
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