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Controller solves biased load problems

An Intersil product story
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Edited by the Electronicstalk editorial team May 21, 2004

The Endura ISL6522B single-phase dual-mode synchronous-buck PWM controller/driver IC is designed to provide exceptional soft-start to power sensitive circuits and gracefully handle prebiased loads.

The Endura ISL6522B single-phase dual-mode synchronous-buck PWM controller/driver IC is designed to provide exceptional soft-start to power sensitive circuits and gracefully handle prebiased loads.

The ISL6522B integrates two mosfet drivers and has the ability to soft-start in a standard-buck mode and seamlessly switch to the synchronous-buck mode.

Applications for this new IC include, but are not limited to, powering microprocessors, FPGAs and ASICs, memory, chip sets as point-of-load (POL) modules or embedded supplies.

The high degree of component and function integration makes this IC a high-performance and cost-saving alternative to legacy solutions.

"Like our recently announced ISL6608 dual-mode mosfet driver, the ISL6522B single-phase dual-mode PWM controller with integrated drivers is designed to meet the emerging needs of the rapidly expanding FPGA and ASIC markets," said Cindy Drapcho, Vice President of Intersil's Power Products.

"Often, FPGAs or ASIC cores exist in a pre-biased condition because of alternate voltage paths, usually from I/O supplies".

"Prebiasing can cause an initial undesirable voltage swing if the regulator is not designed to handle such loads".

"The ISL6522B's standard-buck soft-start mode overcomes the prebias condition and provides smooth regulation startup.

The ISL6522B provides complete control and protection and is optimised for high-performance POL applications.

It is designed to drive two N-channel mosfets in a synchronous rectified buck topology and has standard-buck soft-start capability.

The ISL6522B integrates all of the control, output adjustment, monitoring and protection functions into one space and cost-saving package.

The ISL6522B enables prebiased load operation and targets a myriad of growing FPGA applications.

There are two common scenarios that lead to a pre-iased condition: a components I/O voltage, typically 3.3 V, may be up before the CPU or FPGA core voltage, which forward biases isolation diodes, charging the core voltage supply input capacitors; or the FPGA may be completely powered down but has voltages on its input pins from other equipment.

This voltage forward biases ESD diodes charging the core and I/O supplies' input capacitors.

A voltage regulator needs to be able to power up into a prebiased load by disabling its lower FET while in soft start.

In this condition, the ISL6522B acts as a standard buck convertor.

The output voltage of the ISL6522B convertor can be precisely regulated to as low as 0.8V, with a maximum tolerance of +/-1% over temperature and line voltage variations.

The ISL6522B provides simple, single feedback loop, voltage-mode control with fast transient response.

It includes a 200kHz free-running triangle-wave oscillator that is adjustable from below 50kHz to over 1MHz.

The error amplifier features a 15MHz gain-bandwidth product and 6V/us slew rate which enables high convertor bandwidth for fast transient performance.

The resulting PWM duty ratio ranges from 0 to 100%.

The ISL6522B protects against overcurrent conditions by inhibiting PWM operation.

Current is monitored using the on-resistance of the upper mosfet which eliminates the need for a current sensing resistor.

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