Product category: Design and Development Software
News Release from: Carbon Design Systems | Subject: SOC-VSP
Edited by the Electronicstalk Editorial Team on 5 March 2007
SoC models are fit
for system level design
Models from SOC-VSP software plug-and-play with the Platform Architect design environment from CoWare
Related stories
Replay function speeds software validation
Carbon Design Systems will introduce major new functionality for its SOC-VSP product line at this year's Design Automation Conference
SoC tool suite becomes design language agnostic
SOC-VSP complements the power of ARM RealView SoC Designer by importing Verilog and/or VHDL (RTL) into a RealView SoC development environment
Models from Carbon Design Systems now plug-and-play with the Platform Architect design environment from CoWare, the leading supplier of platform-driven ESL design software and services. Carbon SOC-VSP software creates cycle-accurate models that provide 100% visibility for profiling and design debugging.
These models support a programmer friendly view of the hardware for system validation and have transaction-level interfaces for high-speed execution.
Carbon SOC-VSP software compiles Verilog and/or VHDL hardware descriptions into Platform Architect drag-and-drop components.
The openly available SystemC Modelling Library (SCML) was used to integrate Carbon's models into CoWare's heterogeneous simulation environment and provide full model visibility to the Platform Architect suite of analysis and debugging tools.
Architectural exploration and firmware validation with cycle-accurate models is vital for analysing performance, contention, latency, pipeline bottlenecks, and selecting software/hardware boundaries.
'SoC platform developers and system designers can derive even greater benefits from CoWare's ESL design solutions by using the new transaction-level flow with Carbon SOC-VSP', said AK Kalekos, Vice President of Marketing and Business Development at CoWare.
Further reading
Seminars describe validation before silicon
Carbon Design Systems is working with ARM to bring hands-on seminars that present practical validation solutions to the rising software content in embedded systems
Funding to drive new product development
Carbon Design Systems has raised US $5 million in its series D round of financing
NetEffect finds easy path to ESL
NetEffect has used Carbon's Virtual System Prototyping (VSP) product to validate its second generation 10Gbit/s iWarp Ethernet channel adapter
Automatic compilation speeds model development
Astute Networks has successfully validated both the embedded firmware and hardware for its next generation storage processor chip using Carbon's VSP product
'Better product decisions can be made sooner in the development cycle, and with reduced modelling effort'.
'CoWare is pleased to support this new flow and the increased interoperability it provides our mutual customers'.
'Companies standardising on a SoC methodology require a return-on-investment from their warehouse of new and existing RTL.
Automatically generating ESL models from RTL provides this return', emphasised Alan Swahn, Vice President of Marketing and Business Development at Carbon.
'The advent of SCML has allowed Carbon to tightly meld our model generation with CoWare's robust ESL environment'.
Carbon SOC-VSP software empowers users to create and validate reusable hardware models for CoWare Platform Architect that can be deployed throughout their enterprise.
These models can represent IP blocks or a whole chip.
Together, the joint flow enables designers to perform the detailed analysis necessary to understand how a system's software and hardware really interact.
Every architectural decision processor, third party IP, cache organisation, bus configuration, memory subsystem, and I/O creates tradeoffs that are difficult to analyse without models that have hardware accuracy and an environment that supports the analysis of software-hardware interactions.
Carbon's hardware accurate models can be profiled within Platform Architect, showing precisely how a design's architecture will perform.
Model profile configurations can be saved and modified without recompiling the model.
In this way, architectural exploration can efficiently include different use scenarios and design views.
Carbon's models have distinct advantages over debugging with physical hardware.
With the SOC-VSP wizard, a 'programmer friendly' view of the hardware can be quickly assembled by selecting and ordering signals, registers, ports, and memories.
During software execution, the programmer has this familiar view for efficient profiling and debugging.
In addition, breakpoints, watchpoints, monitors, and traces can be set on internal hardware points to provide the necessary detail to debug complex software-hardware interactions.
Platform Architect is used collaboratively across the design team.
If a software engineer finds a perceived hardware problem while validating software on the Carbon model, the hardware engineer will see the same problem with full visibility and debug capabilities, including waveform viewing.
This ensures that software validated on Carbon models will run on first silicon and that the system's performance matches expectations.
Carbon SOC-VSP software with virtual hardware model generation for CoWare Platform Architect is available now.
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