Product category: Design and Development Software
News Release from: Carbon Design Systems | Subject: VSP
Edited by the Electronicstalk Editorial Team on 24 April 2006
Automatic compilation speeds model development
Astute Networks has successfully validated both the embedded firmware and hardware for its next generation storage processor chip using Carbon's VSP product
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VSP reduced Astute's hardware simulations from months to days on the company's multi-million-gate multicore processor design. In addition, VSP automatically generated a hardware-accurate full-chip model that Astute needed to thoroughly validate its embedded firmware. 'Initially, we bought Carbon's VSP product to accelerate our RTL simulation environment, which was very successful', said Keith Klarer, Vice President of Hardware Engineering at Astute Networks.
'Once we got started, we found that the Carbon's virtual system prototyping technology also provided the accuracy we needed to validate our protocol and resource management firmware'.
'We are delighted that Astute Networks chose Carbon to validate their next generation storage processor', said Alan Swahn, Vice President of Marketing at Carbon Design Systems.
'Our VSP technology enabled Astute to deliver their chip and embedded software right-the-first-time, under a very aggressive design schedule'.
Further reading
Funding to drive new product development
Carbon Design Systems has raised US $5 million in its series D round of financing
Replay function speeds software validation
Carbon Design Systems will introduce major new functionality for its SOC-VSP product line at this year's Design Automation Conference
The Athens processor family, comprising the AN2000 and the AN2004, is the industry's most highly integrated multiprotocol storage processor family of devices offering best-in-class price-power-performance at more than 1.6 million I/O operations per second (IOPs) in less than 14W.
On-chip Ethernet, Fibre Channel and PCI Express I/O interfaces surround a multicore (10 CPU) design.
Specialised hardware engines are used to provide protocol acceleration and to co-ordinate the use of the parallel processors.
The Athens solutions allow storage OEMs to build systems that offer high-end features, low power, and high-performance at entry-level prices.
Astute used VSP to compile the Verilog hardware description for the complete chip, excluding analogue blocks and preverified I/O blocks.
The resulting Carbonised virtual system prototype replaced a hand-created behavioural C model.
Development of the behavioural model was extremely time-consuming, error prone, and difficult to keep in-sync with the RTL model.
VSP's automatic compilation saved months of model development and produced a high-performance, hardware-accurate chip model that was used to validate Astute's embedded firmware.
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