Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: SoC Encounter
Edited by the Electronicstalk Editorial Team on 23 February 2006
SoC platform enables a
first for set top boxes
The Cadence Encounter digital IC design platform has helped STMicroelectronics develop its first single-chip multistandard HDTV decoder
The Cadence Encounter digital IC design platform has helped STMicroelectronics (ST) develop its first single-chip multistandard HDTV decoder. The Encounter platform's speed and capacity helped STMicroelectronics combine all set top box (STB) functions and multi-standard decoding circuitry onto a single chip in record time.
This article was originally published on Electronicstalk on 23 February 2006 at 8.00am (UK)
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The SoC Encounter system - a configuration of the Encounter platform - was used to develop the STB7100 chip with 90nm process technology.
It enabled the most cost-efficient solution for the product, targeted at the top end of the STB market.
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'Our goal for STB7100 was to go into volume production as quickly as possible using the most cost-efficient solution to minimise both design and production costs for our end customers', said Christos Lagomichos, Corporate Vice President and Home Entertainment Group General Manager.
'This required an extraordinary level of integration to combine all the STB functions and multistandard decoding circuitry onto a single chip using 90 nanometre process technology'.
'SoC Encounter's advanced capabilities were key to our ability to design STB7100 in record time, and indispensable to achieve our goal of volume production of the most-cost efficient design'.
To achieve the yield, die size, power, frequency, and density targets for the design, ST Microelectronics tapped the strength of the SoC Encounter system, including global synthesis, prototyping, placement, optimisation, and routing.
Advanced capabilities in multiple-objective low-power synthesis, global physical synthesis, clock-tree synthesis, manufacturing-aware routing and extraction, and signal and power integrity analysis specifically address the complex issues of 90nm design.
'We are extremely happy that the SoC Encounter system enabled this important customer to be the first to achieve this kind of success in the STB market', said Wei-Jin Dai, Corporate Vice President, R and D for Cadence.
'The SoC Encounter system's strength is speed and capacity, and its ability to support complex, high-performance designs'.
'We are particularly proud to be a part of development of this complex STB7100 product'.
'We look forward to our continued relationship with ST'.
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