Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter and Allegro
Edited by the Electronicstalk Editorial Team on 13 June 2005
TSMC integrates nanometre design
platforms
The Cadence Encounter digital IC design platform and Cadence Allegro system interconnect platform have been integrated into TSMC's latest reference flow.
The Cadence Encounter digital IC design platform and Cadence Allegro system interconnect platform have been integrated into TSMC's Reference Flow 6.0 This reference flow, which supports designs targeting TSMC's Nexsys 65nm process technologies, includes innovative Cadence software for power optimisation and analysis, design for manufacturing (DFM), chip-package integration, and design for test (DFT)
This article was originally published on Electronicstalk on 10 Jun 2004 at 8.00am (UK)
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