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Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: RapidIO design kit
Edited by the Electronicstalk Editorial Team on 16 July 2002

Kit speeds comms system design chains

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A novel verification design kit enables systems integrators to design and verify their communications systems faster by implementing the RapidIO standard for high-speed interconnect

This kit includes Cadence EDA technology, services to apply the technology to specific customer needs, and integration with proven intellectual property (IP) from Motorola. The kit is part of the Cadence Design Chain Initiative, which helps companies tighten development relationships throughout their design chain, optimising the chain.

Incorporating verification information related to Motorola's IP into Cadence standard verification offerings enables joint customers to design-in Motorola's IP more quickly and effectively.

Cadence is the first EDA company to license Motorola's RapidIO endpoint technology, and the first to become a sponsoring member of the RapidIO Trade Association.

The RapidIO interconnect architecture addresses the need for reliability, increased bandwidth, and IP reuse for the rapid assembly of communication systems.

This packet-switched, high-performance interconnect technology is designed to be compatible with most integrated communications processors, host processors, and networking digital signal processors.

According to the RapidIO Trade Association, the standard enables chip-to-chip and board-to-board communications at speeds of 10Gbit/s and beyond, while maintaining embedded software compatibility with older PCI-based systems at a fraction of the previous pin count.

According to Sam Fuller, president of the RapidIO Trade Association, "The Trade Association was formed by Motorola, Ericsson and other companies to solve the communication industry's burgeoning need for reliability, increased bandwidth, and faster bus speeds in an intra-system interconnect.

The collaboration between Motorola and Cadence provides important enabling technology for members and for the open design community".

"As a founding member of the RapidIO Trade Association, Motorola's active participation has lead the way in architectural and IP contributions", said Raj Handa, director of PowerQUICC business development and technical marketing for Motorola's Networking and Communications Systems Division.

"Our RapidIO endpoint technology, along with the collaboration with Cadence, will place the RapidIO standard firmly in the design tool flow - enabling Trade Association members and other users of this technology to speed time between standards development and design implementation".

"Today's announcement furthers the Cadence commitment to foster the development and exchange of IP in design chains through the support of open standards", said Rahul Razdan, corporate vice president and general manager of the Cadence Systems and functional verification Group.

"We have served our communication systems customers with IP-enabled solutions, such as the Cadence Signal Processing Worksystem (SPW), for 10 years.

This agreement with Motorola extends our expertise throughout the verification flow, enabling mutual customers to integrate communication systems more efficiently".

Cadence will provide Motorola's parallel RapidIO endpoint IP in a binary form.

Customers will need to obtain a license from Motorola to manufacture systems containing this IP.

Cadence plans to deliver the RapidIO design kit with existing Cadence tool configurations at no additional charge, beginning in September 2002.

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