Product category: Intellectual Property Cores
News Release from: ARM
Edited by the Electronicstalk Editorial Team on 8 June 2004
Synopsys extends library support
Synopsys and ARM are collaborating to deliver Amba AXI verification intellectual property through Synopsys' DesignWare Library and DesignWare Verification Library
Synopsys and ARM are collaborating to deliver amba AXI verification intellectual property (IP) through Synopsys' DesignWare Library and DesignWare Verification Library. Synopsys and ARM will develop the Amba AXI verification IP and make it available for no additional charge to the more than 25,000 design and verification engineers who currently use DesignWare Library products.
This article was originally published on Electronicstalk on 8 June 2004 at 8.00am (UK)
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Amba AXI technology-based DesignWare Verification IP combines the ARM eXtensible Verification Component (XVC) methodology with Synopsys' experience of developing and delivering verification IP, to offer ARM technology-certified Amba AXI verification IP.
Amba AXI technology is a next-generation on-chip interface that enables the easy creation of efficient, high frequency designs, which maximise the use of interconnect resources leading to very high data throughput.
Amba AXI technology supports multi-layer interconnect designs and provides 1.6Gbyte/s per layer data-throughput at 200MHz.
These designs will require a combination of the new Amba AXI interface specification and external industry-standard interfaces like USB 2.0 and PCI Express technology.
With this addition, DesignWare Library products will provide engineers with a complete Amba AXI verification environment for Amba AXI interface-based SoCs, reducing their time-to-market and helping to ensure right-first-time designs of advanced, high-performance core-based SoCs.
Further reading
Suite supports full Cortex processor family
Development suite provides performance improvements and tuning for ARM processor support, most notably by providing better optimisation for the full Cortex processor family
Automated flow speeds Cortex-A8 designs
Synopsys has announced the immediate availability of a fully automated implementation flow enabled by Synopsys IC Compiler for high-performance and low-power applications
Processor is first specifically for FPGAs
The ARM Cortex-M1 processor is the first ARM processor designed specifically for implementation on FPGAs
Synopsys DesignWare Verification IP can help designers save a substantial amount of testbench development effort.
It further enables verification engineers to move toward higher-level testbench functionality with built-in support for coverage-driven constrained-random test verification including features expected to be published in the SystemVerilog Verification Methodology Manual, jointly created by ARM and Synopsys.
"We are working closely with Synopsys to ensure that the Amba AXI technology-based DesignWare solution is fully compliant with the XVC methodology, enabling, ARM to deliver verification vectors that run 'out of the box'", said John Cornish, Director, Product Marketing, at ARM.
"By adding Amba AXI Verification IP to the DesignWare Library products, Synopsys is helping ensure that designers creating Amba AXI technology-based SoCs will have a high-quality, low-risk solution with strong technical support that scales from block-level verification through subsystem to complete SoC verification".
"The collaboration with ARM to extend our popular Amba 2.0 technology-based DesignWare solution to include Amba AXI Verification IP will help enable designers to push performance limits in their high-speed designs", said Guri Stark, Vice President of Marketing, Solutions Group at Synopsys.
"SoC designers will be able to use not only the Amba AXI technology-based DesignWare Verification IP, but also the extensive AMBA 2.0 bus and peripheral implementation and verification IP already in use by hundreds of companies".
Multiple companies have been using the Amba AXI technology-based DesignWare Verification IP on their production high-performance designs.
By relying on DesignWare Verification IP, these design teams have been able to focus on verifying their designs in the context of the interfaces, instead of debugging both designs and models.
As part of an overall verification methodology that leverages the Vera testbench automation tool, the Reference Verification Methodology and DesignWare VIP, Synopsys' Discovery Verification Platform customers using this combination of tools and verification IP have greatly improved their productivity.
The Amba AXI technology-based DesignWare Verification IP is currently in use by early adopters and is planned to be generally available in calendar Q4 2004 and will be included in the DesignWare Library and DesignWare Verification Library products.
Customers who currently own a DesignWare Library or DesignWare Verification Library licence will be able to use the new IP for no additional cost.
DesignWare Library and DesignWare Verification Library (a subset of the DesignWare Library) are available on a subscription or perpetual license basis.
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