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Product category: PC-Compatible Boards and Assemblies
News Release from: Active Silicon | Subject: Phoenix D24CL
Edited by the Electronicstalk Editorial Team on 13 December 2005

Digital frame grabber adopts PC/104-Plus
format

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The Phoenix D24CL in PC/104-Plus format offers high performance and high speeds over the full industrial temperature range.

Vision technology specialist Active Silicon has added a new PC/104-Plus board to its Phoenix range of CameraLink digital frame grabbers The Phoenix D24CL in PC/104-Plus format offers high performance and high speeds over the full industrial temperature range

It has similar functionality to other Phoenix boards and further demonstrates the company's expertise in supporting a wide range of form factors and operating systems.

Phoenix D24CL acquires digital data from a variety of CameraLink sources, including digital frame capture and line scan cameras.

It supports all the formats of Base configuration; single 8 to 16bit data, through 8bit RGB, to dual tap 12bit sources.

It also supports various camera tap formats such as line interlaced, line offset, pixel interlaced and pixel offset.

Region of Interest and subsampling controls are used to increase application-processing speed by only storing the required data.

In addition, the lookup table functionality provides support for gamma correction, dynamic range cropping and binary thresholding in real time.

The data mapper further reduces the load on the host processor by mapping and packing the acquired data prior to transfer across the PCIbus.

For example, the acquired data can be mapped into a suitable format and transferred directly to the graphics display, without the need for any host processing.

The PCI interface has intelligent scatter-gather hardware that reads its instructions direct from memory without host CPU intervention.

This in turn controls the DMA engine, which transfers the packed video data into any target memory that can be reached from the PCIbus.

This can be system memory, graphics memory, or other devices on the same or other PCIbuses, such as DSP cards.

The majority of the functionality is implemented in a single FPGA, providing a flexible solution for interfacing to CameraLink compliant sources.

The FPGA implements the PCI interface, hardware scatter-gather control, PCI initiator burst control (DMA), acquisition control, region of interest and subsampling control, data-mapping functions, datapath FIFOs, and counter/timer support.

In addition the board contains lookup table functionality, a universal asynchronous receiver transmitter, 4bit optoisolated I/O, two 2bit differential input ports and two 8bit TTL I/O ports.

A software development kit (available as a separate item) allows rapid system development and integration.

It includes comprehensive example applications and optimised libraries, and is available for a variety of operating systems via a common API, including 32bit Windows, Mac OS X, DOS, VxWorks, QNX and Linux.

Drivers for third party applications are also available, such as Common Vision Blox and Image-Pro Plus.

As well as functions that control the hardware, the libraries include general-purpose functions for the manipulation and display of images.

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