Start with the news release Magma enhances Hydra hierarchical design planner from Magma Design Automation, which we summarised at the time by saying "Magma Design Automation has announced Hydra 1.1, an enhanced version of the company's hierarchical design-planning solution for large systems on a chip (SoCs).". Several months prior to that, we featured the news release Atmel introduces ASIC custom architecture from Atmel Corporation: "Atmel Corporation announced a custom architecture for 90nm SiliconCity ASIC development, providing up to 350K gates/mm2, offering customers gate densities in the range of a standard cell ASIC. ".
 
In December 2008, we covered the news from Lattice Semiconductor UK - take a look at Lattice enhances design tool software which says: "Lattice Semiconductor has announced version 7.2 of its ISPlever FPGA design tool suite, which includes advanced place and route algorithms. ".
 
Take a look also at the news release from Faraday Technology, Technology meets 65nm challenges, as well as Clock tree synthesis and optimisation unite from Azuro, and PCB design software is even easier to use from Zuken.